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ARMPseudoInst instructions should default to being considered a single 4-byte

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instruction. Any that may be expanded otherwise by MC lowering should
override this value. rdar://8683274

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119713 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-11-18 18:01:40 +00:00
parent 4229c62dcf
commit 056ab107ff
1 changed files with 3 additions and 0 deletions
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3
lib/Target/ARM/ARMInstrFormats.td
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@ -249,6 +249,9 @@ class PseudoInst<dag oops, dag iops, InstrItinClass itin, list<dag> pattern>
class ARMPseudoInst<dag oops, dag iops, InstrItinClass itin, class ARMPseudoInst<dag oops, dag iops, InstrItinClass itin,
list<dag> pattern> list<dag> pattern>
: PseudoInst<oops, iops, itin, pattern> { : PseudoInst<oops, iops, itin, pattern> {
// Default these to 4byte size, as they're almost always expanded to a
// single instruction. Any exceptions can override the SZ field value.
let SZ = Size4Bytes;
list<Predicate> Predicates = [IsARM]; list<Predicate> Predicates = [IsARM];
} }