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Add support for the 'X' inline asm operand modifier.

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Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156577 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2012-05-10 21:48:22 +00:00
parent 89c324bf11
commit 05b7a50210
2 changed files with 31 additions and 4 deletions
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20
lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -382,14 +382,26 @@ bool MipsAsmPrinter::isBlockOnlyReachableByFallthrough(const MachineBasicBlock*
}
// Print out an operand for an inline asm expression.
bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
unsigned AsmVariant,const char *ExtraCode,
raw_ostream &O) {
// Does this asm operand have a single letter operand modifier?
if (ExtraCode && ExtraCode[0])
return true; // Unknown modifier.
if (ExtraCode && ExtraCode[0]) {
if (ExtraCode[1] != 0) return true; // Unknown modifier.
printOperand(MI, OpNo, O);
const MachineOperand &MO = MI->getOperand(OpNum);
switch (ExtraCode[0]) {
default:
return true; // Unknown modifier.
case 'X': // hex const int
if ((MO.getType()) != MachineOperand::MO_Immediate)
return true;
O << "0x" << StringRef(utohexstr(MO.getImm())).lower();
return false;
}
}
printOperand(MI, OpNum, O);
return false;
}

15
test/CodeGen/Mips/inlineasm-operand-code.ll Normal file
View File

@ -0,0 +1,15 @@
; Positive test for inline register constraints
;
; RUN: llc -march=mipsel < %s | FileCheck %s
define i32 @main() nounwind {
entry:
; X with -3
;CHECK: #APP
;CHECK: addi ${{[0-9]+}},${{[0-9]+}},0xfffffffffffffffd
;CHECK: #NO_APP
tail call i32 asm sideeffect "addi $0,$1,${2:X}", "=r,r,I"(i32 7, i32 -3) nounwind
ret i32 0
}