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Skip over two-address use operands.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58883 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2008-11-08 01:44:13 +00:00
parent e96a490d7a
commit 05c356e65a
1 changed files with 12 additions and 0 deletions
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12
lib/Target/ARM/ARMCodeEmitter.cpp
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@ -633,6 +633,8 @@ void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI,
void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
unsigned ImplicitRd,
unsigned ImplicitRn) {
const TargetInstrDesc &TID = MI.getDesc();
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@ -656,6 +658,10 @@ void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
else
Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift;
// If this is a two-address operand, skip it. e.g. LDR_PRE.
if (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1)
++OpIdx;
const MachineOperand &MO2 = MI.getOperand(OpIdx);
unsigned AM2Opc = (ImplicitRn == ARM::PC)
? 0 : MI.getOperand(OpIdx+1).getImm();
@ -689,6 +695,8 @@ void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
unsigned ImplicitRn) {
const TargetInstrDesc &TID = MI.getDesc();
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@ -707,6 +715,10 @@ void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
else
Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift;
// If this is a two-address operand, skip it. e.g. LDRH_POST.
if (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1)
++OpIdx;
const MachineOperand &MO2 = MI.getOperand(OpIdx);
unsigned AM3Opc = (ImplicitRn == ARM::PC)
? 0 : MI.getOperand(OpIdx+1).getImm();