Mark int binops as int-only, add FP binops. Mark FADD/FMUL as commutative but

not associative.  Add [SU]REM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23508 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-09-28 22:38:27 +00:00
parent bed21de39b
commit 0648ccf1e9

View File

@ -65,14 +65,14 @@ class SDTypeProfile<int numresults, int numoperands,
} }
// Builtin profiles. // Builtin profiles.
def SDTImm : SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'. def SDTImm : SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
def SDTVT : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt' def SDTVT : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'
def SDTBinOp : SDTypeProfile<1, 2, [ // add, mul, etc. def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>
]>;
def SDTIntBinOp : SDTypeProfile<1, 2, [ // and, or, xor, udiv, etc.
SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0> SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
]>; ]>;
def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc.
SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>
]>;
def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz
SDTCisSameAs<0, 1>, SDTCisInt<0> SDTCisSameAs<0, 1>, SDTCisInt<0>
]>; ]>;
@ -106,21 +106,29 @@ def node;
def imm : SDNode<"ISD::Constant" , SDTImm , [], "ConstantSDNode">; def imm : SDNode<"ISD::Constant" , SDTImm , [], "ConstantSDNode">;
def vt : SDNode<"ISD::VALUETYPE" , SDTVT , [], "VTSDNode">; def vt : SDNode<"ISD::VALUETYPE" , SDTVT , [], "VTSDNode">;
def add : SDNode<"ISD::ADD" , SDTIntBinOp ,
[SDNPCommutative, SDNPAssociative]>;
def sub : SDNode<"ISD::SUB" , SDTIntBinOp>;
def mul : SDNode<"ISD::MUL" , SDTIntBinOp,
[SDNPCommutative, SDNPAssociative]>;
def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp, [SDNPCommutative]>;
def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>;
def sdiv : SDNode<"ISD::SDIV" , SDTIntBinOp>;
def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>;
def srem : SDNode<"ISD::SREM" , SDTIntBinOp>;
def urem : SDNode<"ISD::UREM" , SDTIntBinOp>;
def and : SDNode<"ISD::AND" , SDTIntBinOp, def and : SDNode<"ISD::AND" , SDTIntBinOp,
[SDNPCommutative, SDNPAssociative]>; [SDNPCommutative, SDNPAssociative]>;
def or : SDNode<"ISD::OR" , SDTIntBinOp, def or : SDNode<"ISD::OR" , SDTIntBinOp,
[SDNPCommutative, SDNPAssociative]>; [SDNPCommutative, SDNPAssociative]>;
def xor : SDNode<"ISD::XOR" , SDTIntBinOp, def xor : SDNode<"ISD::XOR" , SDTIntBinOp,
[SDNPCommutative, SDNPAssociative]>; [SDNPCommutative, SDNPAssociative]>;
def add : SDNode<"ISD::ADD" , SDTBinOp , def fadd : SDNode<"ISD::FADD" , SDTFPBinOp, [SDNPCommutative]>;
[SDNPCommutative, SDNPAssociative]>; def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>;
def sub : SDNode<"ISD::SUB" , SDTBinOp>; def fmul : SDNode<"ISD::FMUL" , SDTFPBinOp, [SDNPCommutative]>;
def mul : SDNode<"ISD::MUL" , SDTBinOp , def fdiv : SDNode<"ISD::FDIV" , SDTFPBinOp>;
[SDNPCommutative, SDNPAssociative]>; def frem : SDNode<"ISD::FREM" , SDTFPBinOp>;
def sdiv : SDNode<"ISD::SDIV" , SDTBinOp>;
def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>;
def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp, [SDNPCommutative]>;
def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>;
def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>; def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>;
def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>; def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>;