6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-19 03:29:22 +00:00
Code Issues Projects Releases Wiki Activity

Bugfixes: inc/dec don't set the carry flag!

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12687 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-04-06 03:36:57 +00:00
parent 92900a65a3
commit 0652167bea
2 changed files with 16 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
lib/Target/X86/InstSelectSimple.cpp
View File

@ -1742,24 +1742,20 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
}
// add X, -1 -> dec X
if (OperatorClass == 0 && Op1C->isAllOnesValue()) {
static unsigned const DECTab[] = {
X86::DEC8r, X86::DEC16r, X86::DEC32r, 0, X86::DEC32r
};
if (OperatorClass == 0 && Op1C->isAllOnesValue() && Class != cLong) {
// Note that we can't use dec for 64-bit decrements, because it does not
// set the carry flag!
static unsigned const DECTab[] = { X86::DEC8r, X86::DEC16r, X86::DEC32r };
BuildMI(*MBB, IP, DECTab[Class], 1, DestReg).addReg(Op0r);
if (Class == cLong) // Dh = sbb Sh, 0
BuildMI(*MBB, IP, X86::SBB32ri, 2, DestReg+1).addReg(Op0r+1).addImm(0);
return;
}
// add X, 1 -> inc X
if (OperatorClass == 0 && Op1C->equalsInt(1)) {
static unsigned const INCTab[] = {
X86::INC8r, X86::INC16r, X86::INC32r, 0, X86::INC32r
};
if (OperatorClass == 0 && Op1C->equalsInt(1) && Class != cLong) {
// Note that we can't use inc for 64-bit increments, because it does not
// set the carry flag!
static unsigned const INCTab[] = { X86::INC8r, X86::INC16r, X86::INC32r };
BuildMI(*MBB, IP, INCTab[Class], 1, DestReg).addReg(Op0r);
if (Class == cLong) // Dh = adc Sh, 0
BuildMI(*MBB, IP, X86::ADC32ri, 2, DestReg+1).addReg(Op0r+1).addImm(0);
return;
}

20
lib/Target/X86/X86ISelSimple.cpp
View File

@ -1742,24 +1742,20 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
}
// add X, -1 -> dec X
if (OperatorClass == 0 && Op1C->isAllOnesValue()) {
static unsigned const DECTab[] = {
X86::DEC8r, X86::DEC16r, X86::DEC32r, 0, X86::DEC32r
};
if (OperatorClass == 0 && Op1C->isAllOnesValue() && Class != cLong) {
// Note that we can't use dec for 64-bit decrements, because it does not
// set the carry flag!
static unsigned const DECTab[] = { X86::DEC8r, X86::DEC16r, X86::DEC32r };
BuildMI(*MBB, IP, DECTab[Class], 1, DestReg).addReg(Op0r);
if (Class == cLong) // Dh = sbb Sh, 0
BuildMI(*MBB, IP, X86::SBB32ri, 2, DestReg+1).addReg(Op0r+1).addImm(0);
return;
}
// add X, 1 -> inc X
if (OperatorClass == 0 && Op1C->equalsInt(1)) {
static unsigned const INCTab[] = {
X86::INC8r, X86::INC16r, X86::INC32r, 0, X86::INC32r
};
if (OperatorClass == 0 && Op1C->equalsInt(1) && Class != cLong) {
// Note that we can't use inc for 64-bit increments, because it does not
// set the carry flag!
static unsigned const INCTab[] = { X86::INC8r, X86::INC16r, X86::INC32r };
BuildMI(*MBB, IP, INCTab[Class], 1, DestReg).addReg(Op0r);
if (Class == cLong) // Dh = adc Sh, 0
BuildMI(*MBB, IP, X86::ADC32ri, 2, DestReg+1).addReg(Op0r+1).addImm(0);
return;
}