mirror of
https://github.com/c64scene-ar/llvm-6502.git
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* Use the new Abstract Frame Manager to handle incoming arguments and
fixed size allocas * Revamp call emission to work with new frame manager git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5178 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
1b849be29e
commit
065faebe10
@ -20,6 +20,7 @@
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/CodeGen/FunctionFrameInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/InstVisitor.h"
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#include "llvm/Target/MRegisterInfo.h"
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@ -73,29 +74,12 @@ namespace {
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bool runOnFunction(Function &Fn) {
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F = &MachineFunction::construct(&Fn, TM);
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// Create all of the machine basic blocks for the function...
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for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
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F->getBasicBlockList().push_back(MBBMap[I] = new MachineBasicBlock(I));
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// Emit instructions to load the arguments... The function's arguments
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// look like this:
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//
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// [EBP] -- copy of old EBP
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// [EBP + 4] -- return address
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// [EBP + 8] -- first argument (leftmost lexically)
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//
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// So we want to start with counter = 2.
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//
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BB = &F->front();
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unsigned ArgOffset = 8;
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for (Function::aiterator I = Fn.abegin(), E = Fn.aend(); I != E;
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++I, ArgOffset += 4) {
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unsigned Reg = getReg(*I);
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// Load it out of the stack frame at EBP + 4*argPos.
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// FIXME: This should load the argument of the appropriate size!!
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addRegOffset(BuildMI(BB, X86::MOVmr32, 4, Reg), X86::EBP, ArgOffset);
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}
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LoadArgumentsToVirtualRegs(Fn);
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// Instruction select everything except PHI nodes
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visit(Fn);
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@ -123,6 +107,10 @@ namespace {
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BB = MBBMap[&LLVM_BB];
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}
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/// LoadArgumentsToVirtualRegs - Load all of the arguments to this function
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/// from the stack into virtual registers.
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///
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void LoadArgumentsToVirtualRegs(Function &F);
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/// SelectPHINodes - Insert machine code to generate phis. This is tricky
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/// because we have to generate our sources into the source basic blocks,
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@ -170,9 +158,12 @@ namespace {
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void visitLoadInst(LoadInst &I);
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void visitStoreInst(StoreInst &I);
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void visitGetElementPtrInst(GetElementPtrInst &I);
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void visitMallocInst(MallocInst &I);
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void visitFreeInst(FreeInst &I);
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void visitAllocaInst(AllocaInst &I);
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// We assume that by this point, malloc instructions have been
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// lowered to calls, and dlsym will magically find malloc for us.
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void visitMallocInst(MallocInst &I) { visitInstruction (I); }
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void visitFreeInst(FreeInst &I) { visitInstruction(I); }
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// Other operators
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void visitShiftInst(ShiftInst &I);
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@ -341,6 +332,59 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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}
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}
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/// LoadArgumentsToVirtualRegs - Load all of the arguments to this function from
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/// the stack into virtual registers.
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///
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void ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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// Emit instructions to load the arguments... On entry to a function on the
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// X86, the stack frame looks like this:
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//
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// [ESP] -- return address
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// [ESP + 4] -- first argument (leftmost lexically) if four bytes in size
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// [ESP + 8] -- second argument, if four bytes in size
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// ...
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//
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unsigned ArgOffset = 0;
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FunctionFrameInfo *FFI = F->getFrameInfo();
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for (Function::aiterator I = Fn.abegin(), E = Fn.aend(); I != E; ++I) {
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unsigned Reg = getReg(*I);
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ArgOffset += 4; // Each argument takes at least 4 bytes on the stack...
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int FI; // Frame object index
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switch (getClassB(I->getType())) {
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case cByte:
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FI = FFI->CreateFixedObject(1, ArgOffset);
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addFrameReference(BuildMI(BB, X86::MOVmr8, 4, Reg), FI);
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break;
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case cShort:
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FI = FFI->CreateFixedObject(2, ArgOffset);
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addFrameReference(BuildMI(BB, X86::MOVmr16, 4, Reg), FI);
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break;
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case cInt:
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FI = FFI->CreateFixedObject(4, ArgOffset);
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addFrameReference(BuildMI(BB, X86::MOVmr32, 4, Reg), FI);
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break;
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case cFP:
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unsigned Opcode;
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if (I->getType() == Type::FloatTy) {
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Opcode = X86::FLDr32;
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FI = FFI->CreateFixedObject(4, ArgOffset);
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} else {
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Opcode = X86::FLDr64;
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ArgOffset += 4; // doubles require 4 additional bytes
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FI = FFI->CreateFixedObject(8, ArgOffset);
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}
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addFrameReference(BuildMI(BB, Opcode, 4, Reg), FI);
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break;
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default:
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assert(0 && "Unhandled argument type!");
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}
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}
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}
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/// SelectPHINodes - Insert machine code to generate phis. This is tricky
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/// because we have to generate our sources into the source basic blocks, not
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/// the current one.
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@ -366,7 +410,8 @@ void ISel::SelectPHINodes() {
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// available in a virtual register, insert the computation code into
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// PredMBB
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//
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// FIXME: This should insert the code into the BOTTOM of the block, not
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// the top of the block. This just makes for huge live ranges...
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MachineBasicBlock::iterator PI = PredMBB->begin();
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while ((*PI)->getOpcode() == X86::PHI) ++PI;
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@ -532,7 +577,7 @@ void ISel::visitBranchInst(BranchInst &BI) {
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// Compare condition with zero, followed by jump-if-equal to ifFalse, and
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// jump-if-nonequal to ifTrue
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unsigned int condReg = getReg(BI.getCondition());
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unsigned condReg = getReg(BI.getCondition());
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BuildMI(BB, X86::CMPri8, 2).addReg(condReg).addZImm(0);
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BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0));
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BuildMI(BB, X86::JE, 1).addPCDisp(BI.getSuccessor(1));
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@ -543,32 +588,64 @@ void ISel::visitBranchInst(BranchInst &BI) {
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/// visitCallInst - Push args on stack and do a procedure call instruction.
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void ISel::visitCallInst(CallInst &CI) {
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// keep a counter of how many bytes we pushed on the stack
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unsigned bytesPushed = 0;
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// Count how many bytes are to be pushed on the stack...
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unsigned NumBytes = 0;
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// Push the arguments on the stack in reverse order, as specified by
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// the ABI.
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for (unsigned i = CI.getNumOperands()-1; i >= 1; --i) {
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Value *v = CI.getOperand(i);
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switch (getClass(v->getType())) {
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case cByte:
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case cShort:
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// Promote V to 32 bits wide, and move the result into EAX,
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// then push EAX.
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promote32 (X86::EAX, v);
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BuildMI(BB, X86::PUSHr32, 1).addReg(X86::EAX);
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bytesPushed += 4;
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break;
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case cInt: {
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unsigned Reg = getReg(v);
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BuildMI(BB, X86::PUSHr32, 1).addReg(Reg);
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bytesPushed += 4;
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break;
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}
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default:
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// FIXME: long/ulong/float/double args not handled.
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visitInstruction(CI);
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break;
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if (CI.getNumOperands() > 1) {
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for (unsigned i = 1, e = CI.getNumOperands(); i != e; ++i)
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switch (getClass(CI.getOperand(i)->getType())) {
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case cByte: case cShort: case cInt:
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NumBytes += 4;
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break;
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case cLong:
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NumBytes += 8;
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break;
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case cFP:
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NumBytes += CI.getOperand(i)->getType() == Type::FloatTy ? 4 : 8;
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break;
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default: assert(0 && "Unknown class!");
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}
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// Adjust the stack pointer for the new arguments...
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BuildMI(BB, X86::ADJCALLSTACKDOWN, 1).addZImm(NumBytes);
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// Arguments go on the stack in reverse order, as specified by the ABI.
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unsigned ArgOffset = 0;
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for (unsigned i = 1, e = CI.getNumOperands(); i != e; ++i) {
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Value *Arg = CI.getOperand(i);
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switch (getClass(Arg->getType())) {
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case cByte:
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case cShort: {
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// Promote arg to 32 bits wide into a temporary register...
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unsigned R = makeAnotherReg(Type::UIntTy);
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promote32(R, Arg);
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addRegOffset(BuildMI(BB, X86::MOVrm32, 5),
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X86::ESP, ArgOffset).addReg(R);
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break;
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}
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case cInt:
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addRegOffset(BuildMI(BB, X86::MOVrm32, 5),
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X86::ESP, ArgOffset).addReg(getReg(Arg));
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break;
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case cFP:
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if (Arg->getType() == Type::FloatTy) {
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addRegOffset(BuildMI(BB, X86::FSTr32, 5),
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X86::ESP, ArgOffset).addReg(getReg(Arg));
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} else {
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assert(Arg->getType() == Type::DoubleTy && "Unknown FP type!");
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ArgOffset += 4;
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addRegOffset(BuildMI(BB, X86::FSTr32, 5),
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X86::ESP, ArgOffset).addReg(getReg(Arg));
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}
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break;
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default:
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// FIXME: long/ulong/float/double args not handled.
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visitInstruction(CI);
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break;
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}
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ArgOffset += 4;
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}
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}
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@ -580,9 +657,7 @@ void ISel::visitCallInst(CallInst &CI) {
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BuildMI(BB, X86::CALLr32, 1).addReg(Reg);
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}
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// Adjust the stack by `bytesPushed' amount if non-zero
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if (bytesPushed > 0)
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BuildMI(BB, X86::ADDri32,2, X86::ESP).addReg(X86::ESP).addZImm(bytesPushed);
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BuildMI(BB, X86::ADJCALLSTACKUP, 1).addZImm(NumBytes);
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// If there is a return value, scavenge the result from the location the call
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// leaves it in...
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@ -771,7 +846,7 @@ void ISel::visitShiftInst (ShiftInst &I) {
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if (OperandClass > cInt)
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visitInstruction(I); // Can't handle longs yet!
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if (ConstantUInt *CUI = dyn_cast <ConstantUInt> (I.getOperand (1)))
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if (ConstantUInt *CUI = dyn_cast<ConstantUInt> (I.getOperand (1)))
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{
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// The shift amount is constant, guaranteed to be a ubyte. Get its value.
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assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
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@ -956,9 +1031,9 @@ ISel::visitCastInst (CastInst &CI)
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{
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const Type *targetType = CI.getType ();
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Value *operand = CI.getOperand (0);
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unsigned int operandReg = getReg (operand);
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unsigned operandReg = getReg (operand);
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const Type *sourceType = operand->getType ();
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unsigned int destReg = getReg (CI);
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unsigned destReg = getReg (CI);
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//
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// Currently we handle:
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//
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@ -1075,11 +1150,11 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
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oe = IdxEnd; oi != oe; ++oi) {
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Value *idx = *oi;
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unsigned nextBasePtrReg = makeAnotherReg(Type::UIntTy);
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if (const StructType *StTy = dyn_cast <StructType> (Ty)) {
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if (const StructType *StTy = dyn_cast<StructType>(Ty)) {
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// It's a struct access. idx is the index into the structure,
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// which names the field. This index must have ubyte type.
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const ConstantUInt *CUI = cast <ConstantUInt> (idx);
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assert (CUI->getType () == Type::UByteTy
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const ConstantUInt *CUI = cast<ConstantUInt>(idx);
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assert(CUI->getType() == Type::UByteTy
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&& "Funny-looking structure index in GEP");
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// Use the TargetData structure to pick out what the layout of
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// the structure is in memory. Since the structure index must
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@ -1088,14 +1163,14 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
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// structure member offsets.
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unsigned idxValue = CUI->getValue();
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unsigned memberOffset =
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TD.getStructLayout (StTy)->MemberOffsets[idxValue];
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TD.getStructLayout(StTy)->MemberOffsets[idxValue];
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// Emit an ADD to add memberOffset to the basePtr.
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BMI(MBB, IP, X86::ADDri32, 2,
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nextBasePtrReg).addReg (basePtrReg).addZImm (memberOffset);
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nextBasePtrReg).addReg(basePtrReg).addZImm(memberOffset);
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// The next type is the member of the structure selected by the
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// index.
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Ty = StTy->getElementTypes ()[idxValue];
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} else if (const SequentialType *SqTy = cast <SequentialType>(Ty)) {
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Ty = StTy->getElementTypes()[idxValue];
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} else if (const SequentialType *SqTy = cast<SequentialType>(Ty)) {
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// It's an array or pointer access: [ArraySize x ElementType].
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// idx is the index into the array. Unlike with structure
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@ -1103,7 +1178,7 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
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// time.
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assert(idx->getType() == Type::LongTy && "Bad GEP array index!");
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// We want to add basePtrReg to (idxReg * sizeof ElementType). First, we
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// We want to add basePtrReg to(idxReg * sizeof ElementType). First, we
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// must find the size of the pointed-to type (Not coincidentally, the next
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// type is the type of the elements in the array).
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Ty = SqTy->getElementType();
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@ -1143,7 +1218,7 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
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}
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// Emit an ADD to add OffsetReg to the basePtr.
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BMI(MBB, IP, X86::ADDrr32, 2,
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nextBasePtrReg).addReg (basePtrReg).addReg (OffsetReg);
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nextBasePtrReg).addReg(basePtrReg).addReg(OffsetReg);
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}
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}
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// Now that we are here, further indices refer to subtypes of this
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@ -1154,51 +1229,62 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
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// basePtrReg. Move it to the register where we were expected to
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// put the answer. A 32-bit move should do it, because we are in
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// ILP32 land.
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BMI(MBB, IP, X86::MOVrr32, 1, TargetReg).addReg (basePtrReg);
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BMI(MBB, IP, X86::MOVrr32, 1, TargetReg).addReg(basePtrReg);
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}
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/// visitMallocInst - I know that personally, whenever I want to remember
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/// something, I have to clear off some space in my brain.
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void
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ISel::visitMallocInst (MallocInst &I)
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{
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// We assume that by this point, malloc instructions have been
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// lowered to calls, and dlsym will magically find malloc for us.
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// So we do not want to see malloc instructions here.
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visitInstruction (I);
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}
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/// visitFreeInst - same story as MallocInst
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void
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ISel::visitFreeInst (FreeInst &I)
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{
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// We assume that by this point, free instructions have been
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// lowered to calls, and dlsym will magically find free for us.
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// So we do not want to see free instructions here.
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visitInstruction (I);
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}
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/// visitAllocaInst - I want some stack space. Come on, man, I said I
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/// want some freakin' stack space.
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void
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ISel::visitAllocaInst (AllocaInst &I)
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{
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/// visitAllocaInst - If this is a fixed size alloca, allocate space from the
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/// frame manager, otherwise do it the hard way.
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///
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void ISel::visitAllocaInst(AllocaInst &I) {
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// Find the data size of the alloca inst's getAllocatedType.
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const Type *allocatedType = I.getAllocatedType ();
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const TargetData &TD = TM.DataLayout;
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unsigned allocatedTypeSize = TD.getTypeSize (allocatedType);
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// Keep stack 32-bit aligned.
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unsigned int allocatedTypeWords = allocatedTypeSize / 4;
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if (allocatedTypeSize % 4 != 0) { allocatedTypeWords++; }
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const Type *Ty = I.getAllocatedType();
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unsigned TySize = TM.getTargetData().getTypeSize(Ty);
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// If this is a fixed size alloca in the entry block for the function,
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// statically stack allocate the space.
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//
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if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(I.getArraySize())) {
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if (I.getParent() == I.getParent()->getParent()->begin()) {
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TySize *= CUI->getValue(); // Get total allocated size...
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unsigned Alignment = TM.getTargetData().getTypeAlignment(Ty);
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// Create a new stack object using the frame manager...
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int FrameIdx = F->getFrameInfo()->CreateStackObject(TySize, Alignment);
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addFrameReference(BuildMI(BB, X86::LEAr32, 5, getReg(I)), FrameIdx);
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return;
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}
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}
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// Create a register to hold the temporary result of multiplying the type size
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// constant by the variable amount.
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unsigned TotalSizeReg = makeAnotherReg(Type::UIntTy);
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unsigned SrcReg1 = getReg(I.getArraySize());
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unsigned SizeReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::MOVir32, 1, SizeReg).addZImm(TySize);
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// TotalSizeReg = mul <numelements>, <TypeSize>
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MachineBasicBlock::iterator MBBI = BB->end();
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doMultiply(BB, MBBI, TotalSizeReg, Type::UIntTy, SrcReg1, SizeReg);
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// AddedSize = add <TotalSizeReg>, 15
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unsigned AddedSizeReg = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::ADDri32, 2, AddedSizeReg).addReg(TotalSizeReg).addZImm(15);
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// AlignedSize = and <AddedSize>, ~15
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unsigned AlignedSize = makeAnotherReg(Type::UIntTy);
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BuildMI(BB, X86::ANDri32, 2, AlignedSize).addReg(AddedSizeReg).addZImm(~15);
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// Subtract size from stack pointer, thereby allocating some space.
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BuildMI(BB, X86::SUBri32, 2,
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X86::ESP).addReg(X86::ESP).addZImm(allocatedTypeWords * 4);
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BuildMI(BB, X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(AlignedSize);
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// Put a pointer to the space into the result register, by copying
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// the stack pointer.
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BuildMI (BB, X86::MOVrr32, 1, getReg (I)).addReg (X86::ESP);
|
||||
BuildMI(BB, X86::MOVrr32, 1, getReg(I)).addReg(X86::ESP);
|
||||
|
||||
// Inform the Frame Information that we have just allocated a variable sized
|
||||
// object.
|
||||
F->getFrameInfo()->CreateVariableSizedObject();
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -20,6 +20,7 @@
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
||||
#include "llvm/CodeGen/SSARegMap.h"
|
||||
#include "llvm/CodeGen/FunctionFrameInfo.h"
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
#include "llvm/Support/InstVisitor.h"
|
||||
#include "llvm/Target/MRegisterInfo.h"
|
||||
@ -73,29 +74,12 @@ namespace {
|
||||
bool runOnFunction(Function &Fn) {
|
||||
F = &MachineFunction::construct(&Fn, TM);
|
||||
|
||||
// Create all of the machine basic blocks for the function...
|
||||
for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
|
||||
F->getBasicBlockList().push_back(MBBMap[I] = new MachineBasicBlock(I));
|
||||
|
||||
// Emit instructions to load the arguments... The function's arguments
|
||||
// look like this:
|
||||
//
|
||||
// [EBP] -- copy of old EBP
|
||||
// [EBP + 4] -- return address
|
||||
// [EBP + 8] -- first argument (leftmost lexically)
|
||||
//
|
||||
// So we want to start with counter = 2.
|
||||
//
|
||||
BB = &F->front();
|
||||
unsigned ArgOffset = 8;
|
||||
for (Function::aiterator I = Fn.abegin(), E = Fn.aend(); I != E;
|
||||
++I, ArgOffset += 4) {
|
||||
unsigned Reg = getReg(*I);
|
||||
|
||||
// Load it out of the stack frame at EBP + 4*argPos.
|
||||
|
||||
// FIXME: This should load the argument of the appropriate size!!
|
||||
addRegOffset(BuildMI(BB, X86::MOVmr32, 4, Reg), X86::EBP, ArgOffset);
|
||||
}
|
||||
LoadArgumentsToVirtualRegs(Fn);
|
||||
|
||||
// Instruction select everything except PHI nodes
|
||||
visit(Fn);
|
||||
@ -123,6 +107,10 @@ namespace {
|
||||
BB = MBBMap[&LLVM_BB];
|
||||
}
|
||||
|
||||
/// LoadArgumentsToVirtualRegs - Load all of the arguments to this function
|
||||
/// from the stack into virtual registers.
|
||||
///
|
||||
void LoadArgumentsToVirtualRegs(Function &F);
|
||||
|
||||
/// SelectPHINodes - Insert machine code to generate phis. This is tricky
|
||||
/// because we have to generate our sources into the source basic blocks,
|
||||
@ -170,9 +158,12 @@ namespace {
|
||||
void visitLoadInst(LoadInst &I);
|
||||
void visitStoreInst(StoreInst &I);
|
||||
void visitGetElementPtrInst(GetElementPtrInst &I);
|
||||
void visitMallocInst(MallocInst &I);
|
||||
void visitFreeInst(FreeInst &I);
|
||||
void visitAllocaInst(AllocaInst &I);
|
||||
|
||||
// We assume that by this point, malloc instructions have been
|
||||
// lowered to calls, and dlsym will magically find malloc for us.
|
||||
void visitMallocInst(MallocInst &I) { visitInstruction (I); }
|
||||
void visitFreeInst(FreeInst &I) { visitInstruction(I); }
|
||||
|
||||
// Other operators
|
||||
void visitShiftInst(ShiftInst &I);
|
||||
@ -341,6 +332,59 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
|
||||
}
|
||||
}
|
||||
|
||||
/// LoadArgumentsToVirtualRegs - Load all of the arguments to this function from
|
||||
/// the stack into virtual registers.
|
||||
///
|
||||
void ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
|
||||
// Emit instructions to load the arguments... On entry to a function on the
|
||||
// X86, the stack frame looks like this:
|
||||
//
|
||||
// [ESP] -- return address
|
||||
// [ESP + 4] -- first argument (leftmost lexically) if four bytes in size
|
||||
// [ESP + 8] -- second argument, if four bytes in size
|
||||
// ...
|
||||
//
|
||||
unsigned ArgOffset = 0;
|
||||
FunctionFrameInfo *FFI = F->getFrameInfo();
|
||||
|
||||
for (Function::aiterator I = Fn.abegin(), E = Fn.aend(); I != E; ++I) {
|
||||
unsigned Reg = getReg(*I);
|
||||
|
||||
ArgOffset += 4; // Each argument takes at least 4 bytes on the stack...
|
||||
int FI; // Frame object index
|
||||
|
||||
switch (getClassB(I->getType())) {
|
||||
case cByte:
|
||||
FI = FFI->CreateFixedObject(1, ArgOffset);
|
||||
addFrameReference(BuildMI(BB, X86::MOVmr8, 4, Reg), FI);
|
||||
break;
|
||||
case cShort:
|
||||
FI = FFI->CreateFixedObject(2, ArgOffset);
|
||||
addFrameReference(BuildMI(BB, X86::MOVmr16, 4, Reg), FI);
|
||||
break;
|
||||
case cInt:
|
||||
FI = FFI->CreateFixedObject(4, ArgOffset);
|
||||
addFrameReference(BuildMI(BB, X86::MOVmr32, 4, Reg), FI);
|
||||
break;
|
||||
case cFP:
|
||||
unsigned Opcode;
|
||||
if (I->getType() == Type::FloatTy) {
|
||||
Opcode = X86::FLDr32;
|
||||
FI = FFI->CreateFixedObject(4, ArgOffset);
|
||||
} else {
|
||||
Opcode = X86::FLDr64;
|
||||
ArgOffset += 4; // doubles require 4 additional bytes
|
||||
FI = FFI->CreateFixedObject(8, ArgOffset);
|
||||
}
|
||||
addFrameReference(BuildMI(BB, Opcode, 4, Reg), FI);
|
||||
break;
|
||||
default:
|
||||
assert(0 && "Unhandled argument type!");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/// SelectPHINodes - Insert machine code to generate phis. This is tricky
|
||||
/// because we have to generate our sources into the source basic blocks, not
|
||||
/// the current one.
|
||||
@ -366,7 +410,8 @@ void ISel::SelectPHINodes() {
|
||||
// available in a virtual register, insert the computation code into
|
||||
// PredMBB
|
||||
//
|
||||
|
||||
// FIXME: This should insert the code into the BOTTOM of the block, not
|
||||
// the top of the block. This just makes for huge live ranges...
|
||||
MachineBasicBlock::iterator PI = PredMBB->begin();
|
||||
while ((*PI)->getOpcode() == X86::PHI) ++PI;
|
||||
|
||||
@ -532,7 +577,7 @@ void ISel::visitBranchInst(BranchInst &BI) {
|
||||
|
||||
// Compare condition with zero, followed by jump-if-equal to ifFalse, and
|
||||
// jump-if-nonequal to ifTrue
|
||||
unsigned int condReg = getReg(BI.getCondition());
|
||||
unsigned condReg = getReg(BI.getCondition());
|
||||
BuildMI(BB, X86::CMPri8, 2).addReg(condReg).addZImm(0);
|
||||
BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0));
|
||||
BuildMI(BB, X86::JE, 1).addPCDisp(BI.getSuccessor(1));
|
||||
@ -543,32 +588,64 @@ void ISel::visitBranchInst(BranchInst &BI) {
|
||||
|
||||
/// visitCallInst - Push args on stack and do a procedure call instruction.
|
||||
void ISel::visitCallInst(CallInst &CI) {
|
||||
// keep a counter of how many bytes we pushed on the stack
|
||||
unsigned bytesPushed = 0;
|
||||
// Count how many bytes are to be pushed on the stack...
|
||||
unsigned NumBytes = 0;
|
||||
|
||||
// Push the arguments on the stack in reverse order, as specified by
|
||||
// the ABI.
|
||||
for (unsigned i = CI.getNumOperands()-1; i >= 1; --i) {
|
||||
Value *v = CI.getOperand(i);
|
||||
switch (getClass(v->getType())) {
|
||||
case cByte:
|
||||
case cShort:
|
||||
// Promote V to 32 bits wide, and move the result into EAX,
|
||||
// then push EAX.
|
||||
promote32 (X86::EAX, v);
|
||||
BuildMI(BB, X86::PUSHr32, 1).addReg(X86::EAX);
|
||||
bytesPushed += 4;
|
||||
break;
|
||||
case cInt: {
|
||||
unsigned Reg = getReg(v);
|
||||
BuildMI(BB, X86::PUSHr32, 1).addReg(Reg);
|
||||
bytesPushed += 4;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
// FIXME: long/ulong/float/double args not handled.
|
||||
visitInstruction(CI);
|
||||
break;
|
||||
if (CI.getNumOperands() > 1) {
|
||||
for (unsigned i = 1, e = CI.getNumOperands(); i != e; ++i)
|
||||
switch (getClass(CI.getOperand(i)->getType())) {
|
||||
case cByte: case cShort: case cInt:
|
||||
NumBytes += 4;
|
||||
break;
|
||||
case cLong:
|
||||
NumBytes += 8;
|
||||
break;
|
||||
case cFP:
|
||||
NumBytes += CI.getOperand(i)->getType() == Type::FloatTy ? 4 : 8;
|
||||
break;
|
||||
default: assert(0 && "Unknown class!");
|
||||
}
|
||||
|
||||
// Adjust the stack pointer for the new arguments...
|
||||
BuildMI(BB, X86::ADJCALLSTACKDOWN, 1).addZImm(NumBytes);
|
||||
|
||||
// Arguments go on the stack in reverse order, as specified by the ABI.
|
||||
unsigned ArgOffset = 0;
|
||||
for (unsigned i = 1, e = CI.getNumOperands(); i != e; ++i) {
|
||||
Value *Arg = CI.getOperand(i);
|
||||
switch (getClass(Arg->getType())) {
|
||||
case cByte:
|
||||
case cShort: {
|
||||
// Promote arg to 32 bits wide into a temporary register...
|
||||
unsigned R = makeAnotherReg(Type::UIntTy);
|
||||
promote32(R, Arg);
|
||||
addRegOffset(BuildMI(BB, X86::MOVrm32, 5),
|
||||
X86::ESP, ArgOffset).addReg(R);
|
||||
break;
|
||||
}
|
||||
case cInt:
|
||||
addRegOffset(BuildMI(BB, X86::MOVrm32, 5),
|
||||
X86::ESP, ArgOffset).addReg(getReg(Arg));
|
||||
break;
|
||||
|
||||
case cFP:
|
||||
if (Arg->getType() == Type::FloatTy) {
|
||||
addRegOffset(BuildMI(BB, X86::FSTr32, 5),
|
||||
X86::ESP, ArgOffset).addReg(getReg(Arg));
|
||||
} else {
|
||||
assert(Arg->getType() == Type::DoubleTy && "Unknown FP type!");
|
||||
ArgOffset += 4;
|
||||
addRegOffset(BuildMI(BB, X86::FSTr32, 5),
|
||||
X86::ESP, ArgOffset).addReg(getReg(Arg));
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
// FIXME: long/ulong/float/double args not handled.
|
||||
visitInstruction(CI);
|
||||
break;
|
||||
}
|
||||
ArgOffset += 4;
|
||||
}
|
||||
}
|
||||
|
||||
@ -580,9 +657,7 @@ void ISel::visitCallInst(CallInst &CI) {
|
||||
BuildMI(BB, X86::CALLr32, 1).addReg(Reg);
|
||||
}
|
||||
|
||||
// Adjust the stack by `bytesPushed' amount if non-zero
|
||||
if (bytesPushed > 0)
|
||||
BuildMI(BB, X86::ADDri32,2, X86::ESP).addReg(X86::ESP).addZImm(bytesPushed);
|
||||
BuildMI(BB, X86::ADJCALLSTACKUP, 1).addZImm(NumBytes);
|
||||
|
||||
// If there is a return value, scavenge the result from the location the call
|
||||
// leaves it in...
|
||||
@ -771,7 +846,7 @@ void ISel::visitShiftInst (ShiftInst &I) {
|
||||
if (OperandClass > cInt)
|
||||
visitInstruction(I); // Can't handle longs yet!
|
||||
|
||||
if (ConstantUInt *CUI = dyn_cast <ConstantUInt> (I.getOperand (1)))
|
||||
if (ConstantUInt *CUI = dyn_cast<ConstantUInt> (I.getOperand (1)))
|
||||
{
|
||||
// The shift amount is constant, guaranteed to be a ubyte. Get its value.
|
||||
assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
|
||||
@ -956,9 +1031,9 @@ ISel::visitCastInst (CastInst &CI)
|
||||
{
|
||||
const Type *targetType = CI.getType ();
|
||||
Value *operand = CI.getOperand (0);
|
||||
unsigned int operandReg = getReg (operand);
|
||||
unsigned operandReg = getReg (operand);
|
||||
const Type *sourceType = operand->getType ();
|
||||
unsigned int destReg = getReg (CI);
|
||||
unsigned destReg = getReg (CI);
|
||||
//
|
||||
// Currently we handle:
|
||||
//
|
||||
@ -1075,11 +1150,11 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
|
||||
oe = IdxEnd; oi != oe; ++oi) {
|
||||
Value *idx = *oi;
|
||||
unsigned nextBasePtrReg = makeAnotherReg(Type::UIntTy);
|
||||
if (const StructType *StTy = dyn_cast <StructType> (Ty)) {
|
||||
if (const StructType *StTy = dyn_cast<StructType>(Ty)) {
|
||||
// It's a struct access. idx is the index into the structure,
|
||||
// which names the field. This index must have ubyte type.
|
||||
const ConstantUInt *CUI = cast <ConstantUInt> (idx);
|
||||
assert (CUI->getType () == Type::UByteTy
|
||||
const ConstantUInt *CUI = cast<ConstantUInt>(idx);
|
||||
assert(CUI->getType() == Type::UByteTy
|
||||
&& "Funny-looking structure index in GEP");
|
||||
// Use the TargetData structure to pick out what the layout of
|
||||
// the structure is in memory. Since the structure index must
|
||||
@ -1088,14 +1163,14 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
|
||||
// structure member offsets.
|
||||
unsigned idxValue = CUI->getValue();
|
||||
unsigned memberOffset =
|
||||
TD.getStructLayout (StTy)->MemberOffsets[idxValue];
|
||||
TD.getStructLayout(StTy)->MemberOffsets[idxValue];
|
||||
// Emit an ADD to add memberOffset to the basePtr.
|
||||
BMI(MBB, IP, X86::ADDri32, 2,
|
||||
nextBasePtrReg).addReg (basePtrReg).addZImm (memberOffset);
|
||||
nextBasePtrReg).addReg(basePtrReg).addZImm(memberOffset);
|
||||
// The next type is the member of the structure selected by the
|
||||
// index.
|
||||
Ty = StTy->getElementTypes ()[idxValue];
|
||||
} else if (const SequentialType *SqTy = cast <SequentialType>(Ty)) {
|
||||
Ty = StTy->getElementTypes()[idxValue];
|
||||
} else if (const SequentialType *SqTy = cast<SequentialType>(Ty)) {
|
||||
// It's an array or pointer access: [ArraySize x ElementType].
|
||||
|
||||
// idx is the index into the array. Unlike with structure
|
||||
@ -1103,7 +1178,7 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
|
||||
// time.
|
||||
assert(idx->getType() == Type::LongTy && "Bad GEP array index!");
|
||||
|
||||
// We want to add basePtrReg to (idxReg * sizeof ElementType). First, we
|
||||
// We want to add basePtrReg to(idxReg * sizeof ElementType). First, we
|
||||
// must find the size of the pointed-to type (Not coincidentally, the next
|
||||
// type is the type of the elements in the array).
|
||||
Ty = SqTy->getElementType();
|
||||
@ -1143,7 +1218,7 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
|
||||
}
|
||||
// Emit an ADD to add OffsetReg to the basePtr.
|
||||
BMI(MBB, IP, X86::ADDrr32, 2,
|
||||
nextBasePtrReg).addReg (basePtrReg).addReg (OffsetReg);
|
||||
nextBasePtrReg).addReg(basePtrReg).addReg(OffsetReg);
|
||||
}
|
||||
}
|
||||
// Now that we are here, further indices refer to subtypes of this
|
||||
@ -1154,51 +1229,62 @@ void ISel::emitGEPOperation(MachineBasicBlock *MBB,
|
||||
// basePtrReg. Move it to the register where we were expected to
|
||||
// put the answer. A 32-bit move should do it, because we are in
|
||||
// ILP32 land.
|
||||
BMI(MBB, IP, X86::MOVrr32, 1, TargetReg).addReg (basePtrReg);
|
||||
BMI(MBB, IP, X86::MOVrr32, 1, TargetReg).addReg(basePtrReg);
|
||||
}
|
||||
|
||||
|
||||
/// visitMallocInst - I know that personally, whenever I want to remember
|
||||
/// something, I have to clear off some space in my brain.
|
||||
void
|
||||
ISel::visitMallocInst (MallocInst &I)
|
||||
{
|
||||
// We assume that by this point, malloc instructions have been
|
||||
// lowered to calls, and dlsym will magically find malloc for us.
|
||||
// So we do not want to see malloc instructions here.
|
||||
visitInstruction (I);
|
||||
}
|
||||
|
||||
|
||||
/// visitFreeInst - same story as MallocInst
|
||||
void
|
||||
ISel::visitFreeInst (FreeInst &I)
|
||||
{
|
||||
// We assume that by this point, free instructions have been
|
||||
// lowered to calls, and dlsym will magically find free for us.
|
||||
// So we do not want to see free instructions here.
|
||||
visitInstruction (I);
|
||||
}
|
||||
|
||||
|
||||
/// visitAllocaInst - I want some stack space. Come on, man, I said I
|
||||
/// want some freakin' stack space.
|
||||
void
|
||||
ISel::visitAllocaInst (AllocaInst &I)
|
||||
{
|
||||
/// visitAllocaInst - If this is a fixed size alloca, allocate space from the
|
||||
/// frame manager, otherwise do it the hard way.
|
||||
///
|
||||
void ISel::visitAllocaInst(AllocaInst &I) {
|
||||
// Find the data size of the alloca inst's getAllocatedType.
|
||||
const Type *allocatedType = I.getAllocatedType ();
|
||||
const TargetData &TD = TM.DataLayout;
|
||||
unsigned allocatedTypeSize = TD.getTypeSize (allocatedType);
|
||||
// Keep stack 32-bit aligned.
|
||||
unsigned int allocatedTypeWords = allocatedTypeSize / 4;
|
||||
if (allocatedTypeSize % 4 != 0) { allocatedTypeWords++; }
|
||||
const Type *Ty = I.getAllocatedType();
|
||||
unsigned TySize = TM.getTargetData().getTypeSize(Ty);
|
||||
|
||||
// If this is a fixed size alloca in the entry block for the function,
|
||||
// statically stack allocate the space.
|
||||
//
|
||||
if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(I.getArraySize())) {
|
||||
if (I.getParent() == I.getParent()->getParent()->begin()) {
|
||||
TySize *= CUI->getValue(); // Get total allocated size...
|
||||
unsigned Alignment = TM.getTargetData().getTypeAlignment(Ty);
|
||||
|
||||
// Create a new stack object using the frame manager...
|
||||
int FrameIdx = F->getFrameInfo()->CreateStackObject(TySize, Alignment);
|
||||
addFrameReference(BuildMI(BB, X86::LEAr32, 5, getReg(I)), FrameIdx);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// Create a register to hold the temporary result of multiplying the type size
|
||||
// constant by the variable amount.
|
||||
unsigned TotalSizeReg = makeAnotherReg(Type::UIntTy);
|
||||
unsigned SrcReg1 = getReg(I.getArraySize());
|
||||
unsigned SizeReg = makeAnotherReg(Type::UIntTy);
|
||||
BuildMI(BB, X86::MOVir32, 1, SizeReg).addZImm(TySize);
|
||||
|
||||
// TotalSizeReg = mul <numelements>, <TypeSize>
|
||||
MachineBasicBlock::iterator MBBI = BB->end();
|
||||
doMultiply(BB, MBBI, TotalSizeReg, Type::UIntTy, SrcReg1, SizeReg);
|
||||
|
||||
// AddedSize = add <TotalSizeReg>, 15
|
||||
unsigned AddedSizeReg = makeAnotherReg(Type::UIntTy);
|
||||
BuildMI(BB, X86::ADDri32, 2, AddedSizeReg).addReg(TotalSizeReg).addZImm(15);
|
||||
|
||||
// AlignedSize = and <AddedSize>, ~15
|
||||
unsigned AlignedSize = makeAnotherReg(Type::UIntTy);
|
||||
BuildMI(BB, X86::ANDri32, 2, AlignedSize).addReg(AddedSizeReg).addZImm(~15);
|
||||
|
||||
// Subtract size from stack pointer, thereby allocating some space.
|
||||
BuildMI(BB, X86::SUBri32, 2,
|
||||
X86::ESP).addReg(X86::ESP).addZImm(allocatedTypeWords * 4);
|
||||
BuildMI(BB, X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(AlignedSize);
|
||||
|
||||
// Put a pointer to the space into the result register, by copying
|
||||
// the stack pointer.
|
||||
BuildMI (BB, X86::MOVrr32, 1, getReg (I)).addReg (X86::ESP);
|
||||
BuildMI(BB, X86::MOVrr32, 1, getReg(I)).addReg(X86::ESP);
|
||||
|
||||
// Inform the Frame Information that we have just allocated a variable sized
|
||||
// object.
|
||||
F->getFrameInfo()->CreateVariableSizedObject();
|
||||
}
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user