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Track pristine registers as if they were live-in in the register scavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78913 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -69,12 +69,18 @@ void RegScavenger::initRegState() {
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// Reserved registers are always used.
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RegsAvailable ^= ReservedRegs;
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// Live-in registers are in use.
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if (!MBB || MBB->livein_empty())
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if (!MBB)
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return;
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// Live-in registers are in use.
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for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
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E = MBB->livein_end(); I != E; ++I)
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setUsed(*I);
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// Pristine CSRs are also unavailable.
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BitVector PR = MBB->getParent()->getFrameInfo()->getPristineRegs(MBB);
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for (int I = PR.find_first(); I>0; I = PR.find_next(I))
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setUsed(I);
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}
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void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
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@ -370,11 +376,10 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
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}
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}
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// If we found an unused register that is defined by a later instruction,
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// there is no reason to spill it. We have probably found a callee-saved
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// register that has been saved in the prologue, but happens to be unused at
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// this point.
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if (!isAliasUsed(Reg) && UseMI != NULL)
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// If we found an unused register there is no reason to spill it. We have
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// probably found a callee-saved register that has been saved in the
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// prologue, but happens to be unused at this point.
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if (!isAliasUsed(Reg))
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return Reg;
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if (Dist >= MaxDist) {
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@ -391,13 +396,6 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
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// Avoid infinite regress
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ScavengedReg = SReg;
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// Make sure SReg is marked as used. It could be considered available
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// if it is one of the callee saved registers, but hasn't been spilled.
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if (!isUsed(SReg)) {
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MBB->addLiveIn(SReg);
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setUsed(SReg);
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}
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// Spill the scavenged register before I.
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TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC);
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MachineBasicBlock::iterator II = prior(I);
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