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There is no need to emit a shift if the size is constant, which is common

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11420 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-02-13 23:36:47 +00:00
parent 8ff9a8639a
commit 0712283e43
2 changed files with 28 additions and 14 deletions
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21
lib/Target/X86/InstSelectSimple.cpp
View File

@ -1198,21 +1198,29 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
} }
// Turn the byte code into # iterations // Turn the byte code into # iterations
unsigned ByteReg = getReg(CI.getOperand(3)); unsigned ByteReg;
unsigned CountReg; unsigned CountReg;
switch (Align & 3) { switch (Align & 3) {
case 2: // WORD aligned case 2: // WORD aligned
CountReg = makeAnotherReg(Type::IntTy); if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) {
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1); CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2));
} else {
CountReg = makeAnotherReg(Type::IntTy);
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1);
}
break; break;
case 0: // DWORD aligned case 0: // DWORD aligned
CountReg = makeAnotherReg(Type::IntTy); if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) {
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2); CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4));
} else {
CountReg = makeAnotherReg(Type::IntTy);
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2);
}
break; break;
case 1: // BYTE aligned case 1: // BYTE aligned
case 3: // BYTE aligned case 3: // BYTE aligned
CountReg = ByteReg; CountReg = getReg(CI.getOperand(3));
break; break;
} }
@ -1224,7 +1232,6 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
BuildMI(BB, X86::MOVrr32, 1, X86::EDI).addReg(TmpReg1); BuildMI(BB, X86::MOVrr32, 1, X86::EDI).addReg(TmpReg1);
BuildMI(BB, X86::MOVrr32, 1, X86::ESI).addReg(TmpReg2); BuildMI(BB, X86::MOVrr32, 1, X86::ESI).addReg(TmpReg2);
unsigned Bytes = getReg(CI.getOperand(3));
switch (Align & 3) { switch (Align & 3) {
case 1: // BYTE aligned case 1: // BYTE aligned
case 3: // BYTE aligned case 3: // BYTE aligned

21
lib/Target/X86/X86ISelSimple.cpp
View File

@ -1198,21 +1198,29 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
} }
// Turn the byte code into # iterations // Turn the byte code into # iterations
unsigned ByteReg = getReg(CI.getOperand(3)); unsigned ByteReg;
unsigned CountReg; unsigned CountReg;
switch (Align & 3) { switch (Align & 3) {
case 2: // WORD aligned case 2: // WORD aligned
CountReg = makeAnotherReg(Type::IntTy); if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) {
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1); CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2));
} else {
CountReg = makeAnotherReg(Type::IntTy);
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1);
}
break; break;
case 0: // DWORD aligned case 0: // DWORD aligned
CountReg = makeAnotherReg(Type::IntTy); if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) {
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2); CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4));
} else {
CountReg = makeAnotherReg(Type::IntTy);
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2);
}
break; break;
case 1: // BYTE aligned case 1: // BYTE aligned
case 3: // BYTE aligned case 3: // BYTE aligned
CountReg = ByteReg; CountReg = getReg(CI.getOperand(3));
break; break;
} }
@ -1224,7 +1232,6 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
BuildMI(BB, X86::MOVrr32, 1, X86::EDI).addReg(TmpReg1); BuildMI(BB, X86::MOVrr32, 1, X86::EDI).addReg(TmpReg1);
BuildMI(BB, X86::MOVrr32, 1, X86::ESI).addReg(TmpReg2); BuildMI(BB, X86::MOVrr32, 1, X86::ESI).addReg(TmpReg2);
unsigned Bytes = getReg(CI.getOperand(3));
switch (Align & 3) { switch (Align & 3) {
case 1: // BYTE aligned case 1: // BYTE aligned
case 3: // BYTE aligned case 3: // BYTE aligned