misched: tag a few XFAILs that I plan to fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153222 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/X86/lsr-reuse.ll

@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s
 target datalayout = "e-p:64:64:64"
 target triple = "x86_64-unknown-unknown"

test/CodeGen/X86/misched-new.ll

@@ -1,5 +1,6 @@
-; RUN: true
-; llc -enable-misched -misched=shuffle -misched-bottomup < %s
+; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s
+; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ;
 ; Interesting MachineScheduler cases.
 
@@ -7,6 +8,10 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32,
 
 ; From oggenc.
 ; After coalescing, we have a dead superreg (RAX) definition.
+;
+; CHECK: xorl %esi, %esi
+; CHECK: movl $32, %ecx
+; CHECK: rep;movsl
 define fastcc void @_preextrapolate_helper() nounwind uwtable ssp {
 entry:
   br i1 undef, label %for.cond.preheader, label %if.end

test/CodeGen/X86/remat-scalar-zero.ll

@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t
 ; RUN: not grep xor %t
 ; RUN: not grep movap %t

test/CodeGen/X86/zext-sext.ll

@@ -1,4 +1,5 @@
 ; XFAIL: *
+; ...should pass. See PR12324: misched bringup
 ; RUN: llc < %s -march=x86-64 | FileCheck %s
 ; <rdar://problem/8006248>