6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-26 07:34:14 +00:00
Code Issues Projects Releases Wiki Activity

Reapply r240291: Fix shl folding in DAG combiner.

Browse Source 
The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared.

It has been reverted previously because of some problems with comparing APInt with raw uint64_t. That has been fixed/changed with r241204.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241254 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Pawel Bylica 2015-07-02 11:44:54 +00:00
parent 8992bae990
commit 074d71dea6
2 changed files with 10 additions and 1 deletions
lib/CodeGen/SelectionDAG
DAGCombiner.cpp
test/CodeGen/X86
fold-vector-shl-crash.ll

2
lib/CodeGen/SelectionDAG/DAGCombiner.cpp

@ -4278,7 +4278,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
if (isNullConstant(N0))
return N0;
// fold (shl x, c >= size(x)) -> undef
if (N1C && N1C->getZExtValue() >= OpSizeInBits)
if (N1C && N1C->getAPIntValue().uge(OpSizeInBits))
return DAG.getUNDEF(VT);
// fold (shl x, 0) -> x
if (N1C && N1C->isNullValue())

9
test/CodeGen/X86/fold-vector-shl-crash.ll Normal file

@ -0,0 +1,9 @@
; RUN: llc < %s -march=x86-64 | FileCheck %s
; RUN: llc < %s -march=x86 | FileCheck %s
;CHECK-LABEL: test
define <2 x i256> @test() {
%S = shufflevector <2 x i256> zeroinitializer, <2 x i256> <i256 -1, i256 -1>, <2 x i32> <i32 0, i32 2>
%B = shl <2 x i256> %S, <i256 -1, i256 -1> ; DAG Combiner crashes here
ret <2 x i256> %B
}