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- Add a bit more plumbing assigning an order to SDNodes.

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- Modify the "dump" method to emit the order of an SDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91845 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2009-12-21 21:59:52 +00:00
parent f660802f34
commit 0777e92721
3 changed files with 35 additions and 9 deletions
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3
include/llvm/CodeGen/SelectionDAG.h
View File

@ -834,6 +834,9 @@ public:
/// AssignOrdering - Assign an order to the SDNode.
void AssignOrdering(SDNode *SD, unsigned Order);
/// GetOrdering - Get the order for the SDNode.
unsigned GetOrdering(const SDNode *SD) const;
void dump() const;
/// CreateStackTemporary - Create a stack temporary, suitable for holding the

18
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -5218,6 +5218,12 @@ void SelectionDAG::AssignOrdering(SDNode *SD, unsigned Order) {
Ordering->add(SD, Order);
}
/// GetOrdering - Get the order for the SDNode.
unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
assert(SD && "Trying to get the order of a null node!");
return Ordering ? Ordering->getOrder(SD) : 0;
}
//===----------------------------------------------------------------------===//
// SDNode Class
@ -5857,6 +5863,10 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
if (unsigned int TF = BA->getTargetFlags())
OS << " [TF=" << TF << ']';
}
if (G)
if (unsigned Order = G->GetOrdering(this))
OS << " [ORD=" << Order << ']';
}
void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
@ -6062,25 +6072,31 @@ static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
const SelectionDAG *G, VisitedSDNodeSet &once) {
if (!once.insert(N)) // If we've been here before, return now.
return;
// Dump the current SDNode, but don't end the line yet.
OS << std::string(indent, ' ');
N->printr(OS, G);
// Having printed this SDNode, walk the children:
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
const SDNode *child = N->getOperand(i).getNode();
if (i) OS << ",";
OS << " ";
if (child->getNumOperands() == 0) {
// This child has no grandchildren; print it inline right here.
child->printr(OS, G);
once.insert(child);
} else { // Just the address. FIXME: also print the child's opcode
} else { // Just the address. FIXME: also print the child's opcode.
OS << (void*)child;
if (unsigned RN = N->getOperand(i).getResNo())
OS << ":" << RN;
}
}
OS << "\n";
// Dump children that have grandchildren on their own line(s).
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
const SDNode *child = N->getOperand(i).getNode();

23
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -1418,11 +1418,14 @@ void SelectionDAGBuilder::visitBitTestCase(MachineBasicBlock* NextMBB,
if (++BBI != FuncInfo.MF->end())
NextBlock = BBI;
if (NextMBB == NextBlock)
DAG.setRoot(BrAnd);
else
DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrAnd,
DAG.getBasicBlock(NextMBB)));
if (NextMBB != NextBlock)
BrAnd = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrAnd,
DAG.getBasicBlock(NextMBB));
DAG.setRoot(BrAnd);
if (DisableScheduling)
DAG.AssignOrdering(BrAnd.getNode(), SDNodeOrder);
}
void SelectionDAGBuilder::visitInvoke(InvokeInst &I) {
@ -1445,9 +1448,13 @@ void SelectionDAGBuilder::visitInvoke(InvokeInst &I) {
CurMBB->addSuccessor(LandingPad);
// Drop into normal successor.
DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
MVT::Other, getControlRoot(),
DAG.getBasicBlock(Return)));
SDValue Branch = DAG.getNode(ISD::BR, getCurDebugLoc(),
MVT::Other, getControlRoot(),
DAG.getBasicBlock(Return));
DAG.setRoot(Branch);
if (DisableScheduling)
DAG.AssignOrdering(Branch.getNode(), SDNodeOrder);
}
void SelectionDAGBuilder::visitUnwind(UnwindInst &I) {