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Rename member variables to follow the rest of LLVM.

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No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124257 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2011-01-26 00:50:53 +00:00
parent a2e868d34c
commit 078628465b
2 changed files with 295 additions and 295 deletions
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438
lib/CodeGen/SplitKit.cpp
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@ -41,51 +41,51 @@ AllowSplit("spiller-splits-edges",
SplitAnalysis::SplitAnalysis(const MachineFunction &mf,
const LiveIntervals &lis,
const MachineLoopInfo &mli)
: mf_(mf),
lis_(lis),
loops_(mli),
tii_(*mf.getTarget().getInstrInfo()),
curli_(0) {}
: MF(mf),
LIS(lis),
Loops(mli),
TII(*mf.getTarget().getInstrInfo()),
CurLI(0) {}
void SplitAnalysis::clear() {
UseSlots.clear();
usingInstrs_.clear();
usingBlocks_.clear();
usingLoops_.clear();
curli_ = 0;
UsingInstrs.clear();
UsingBlocks.clear();
UsingLoops.clear();
CurLI = 0;
}
bool SplitAnalysis::canAnalyzeBranch(const MachineBasicBlock *MBB) {
MachineBasicBlock *T, *F;
SmallVector<MachineOperand, 4> Cond;
return !tii_.AnalyzeBranch(const_cast<MachineBasicBlock&>(*MBB), T, F, Cond);
return !TII.AnalyzeBranch(const_cast<MachineBasicBlock&>(*MBB), T, F, Cond);
}
/// analyzeUses - Count instructions, basic blocks, and loops using curli.
/// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
void SplitAnalysis::analyzeUses() {
const MachineRegisterInfo &MRI = mf_.getRegInfo();
for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(curli_->reg);
const MachineRegisterInfo &MRI = MF.getRegInfo();
for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg);
MachineInstr *MI = I.skipInstruction();) {
if (MI->isDebugValue() || !usingInstrs_.insert(MI))
if (MI->isDebugValue() || !UsingInstrs.insert(MI))
continue;
UseSlots.push_back(lis_.getInstructionIndex(MI).getDefIndex());
UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex());
MachineBasicBlock *MBB = MI->getParent();
if (usingBlocks_[MBB]++)
if (UsingBlocks[MBB]++)
continue;
for (MachineLoop *Loop = loops_.getLoopFor(MBB); Loop;
for (MachineLoop *Loop = Loops.getLoopFor(MBB); Loop;
Loop = Loop->getParentLoop())
usingLoops_[Loop]++;
UsingLoops[Loop]++;
}
array_pod_sort(UseSlots.begin(), UseSlots.end());
DEBUG(dbgs() << " counted "
<< usingInstrs_.size() << " instrs, "
<< usingBlocks_.size() << " blocks, "
<< usingLoops_.size() << " loops.\n");
<< UsingInstrs.size() << " instrs, "
<< UsingBlocks.size() << " blocks, "
<< UsingLoops.size() << " loops.\n");
}
void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const {
for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) {
unsigned count = usingBlocks_.lookup(*I);
unsigned count = UsingBlocks.lookup(*I);
OS << " BB#" << (*I)->getNumber();
if (count)
OS << '(' << count << ')';
@ -127,12 +127,12 @@ void SplitAnalysis::print(const LoopBlocks &B, raw_ostream &OS) const {
print(B.Exits, OS);
}
/// analyzeLoopPeripheralUse - Return an enum describing how curli_ is used in
/// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in
/// and around the Loop.
SplitAnalysis::LoopPeripheralUse SplitAnalysis::
analyzeLoopPeripheralUse(const SplitAnalysis::LoopBlocks &Blocks) {
LoopPeripheralUse use = ContainedInLoop;
for (BlockCountMap::iterator I = usingBlocks_.begin(), E = usingBlocks_.end();
for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end();
I != E; ++I) {
const MachineBasicBlock *MBB = I->first;
// Is this a peripheral block?
@ -159,7 +159,7 @@ void SplitAnalysis::getCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
BlockPtrSet &CriticalExits) {
CriticalExits.clear();
// A critical exit block has curli live-in, and has a predecessor that is not
// A critical exit block has CurLI live-in, and has a predecessor that is not
// in the loop nor a loop predecessor. For such an exit block, the edges
// carrying the new variable must be moved to a new pre-exit block.
for (BlockPtrSet::iterator I = Blocks.Exits.begin(), E = Blocks.Exits.end();
@ -168,8 +168,8 @@ void SplitAnalysis::getCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
// A single-predecessor exit block is definitely not a critical edge.
if (Exit->pred_size() == 1)
continue;
// This exit may not have curli live in at all. No need to split.
if (!lis_.isLiveInToMBB(*curli_, Exit))
// This exit may not have CurLI live in at all. No need to split.
if (!LIS.isLiveInToMBB(*CurLI, Exit))
continue;
// Does this exit block have a predecessor that is not a loop block or loop
// predecessor?
@ -189,8 +189,8 @@ void SplitAnalysis::getCriticalPreds(const SplitAnalysis::LoopBlocks &Blocks,
BlockPtrSet &CriticalPreds) {
CriticalPreds.clear();
// A critical predecessor block has curli live-out, and has a successor that
// has curli live-in and is not in the loop nor a loop exit block. For such a
// A critical predecessor block has CurLI live-out, and has a successor that
// has CurLI live-in and is not in the loop nor a loop exit block. For such a
// predecessor block, we must carry the value in both the 'inside' and
// 'outside' registers.
for (BlockPtrSet::iterator I = Blocks.Preds.begin(), E = Blocks.Preds.end();
@ -199,8 +199,8 @@ void SplitAnalysis::getCriticalPreds(const SplitAnalysis::LoopBlocks &Blocks,
// Definitely not a critical edge.
if (Pred->succ_size() == 1)
continue;
// This block may not have curli live out at all if there is a PHI.
if (!lis_.isLiveOutOfMBB(*curli_, Pred))
// This block may not have CurLI live out at all if there is a PHI.
if (!LIS.isLiveOutOfMBB(*CurLI, Pred))
continue;
// Does this block have a successor outside the loop?
for (MachineBasicBlock::const_pred_iterator SI = Pred->succ_begin(),
@ -208,7 +208,7 @@ void SplitAnalysis::getCriticalPreds(const SplitAnalysis::LoopBlocks &Blocks,
const MachineBasicBlock *Succ = *SI;
if (Blocks.Loop.count(Succ) || Blocks.Exits.count(Succ))
continue;
if (!lis_.isLiveInToMBB(*curli_, Succ))
if (!LIS.isLiveInToMBB(*CurLI, Succ))
continue;
// This is a critical predecessor block.
CriticalPreds.insert(Pred);
@ -245,7 +245,7 @@ SplitAnalysis::canSplitCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
// If Succ's layout predecessor falls through, that too must be analyzable.
// We need to insert the pre-exit block in the gap.
MachineFunction::const_iterator MFI = Succ;
if (MFI == mf_.begin())
if (MFI == MF.begin())
continue;
if (!canAnalyzeBranch(--MFI))
return false;
@ -256,21 +256,21 @@ SplitAnalysis::canSplitCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
void SplitAnalysis::analyze(const LiveInterval *li) {
clear();
curli_ = li;
CurLI = li;
analyzeUses();
}
void SplitAnalysis::getSplitLoops(LoopPtrSet &Loops) {
assert(curli_ && "Call analyze() before getSplitLoops");
if (usingLoops_.empty())
assert(CurLI && "Call analyze() before getSplitLoops");
if (UsingLoops.empty())
return;
LoopBlocks Blocks;
BlockPtrSet CriticalExits;
// We split around loops where curli is used outside the periphery.
for (LoopCountMap::const_iterator I = usingLoops_.begin(),
E = usingLoops_.end(); I != E; ++I) {
// We split around loops where CurLI is used outside the periphery.
for (LoopCountMap::const_iterator I = UsingLoops.begin(),
E = UsingLoops.end(); I != E; ++I) {
const MachineLoop *Loop = I->first;
getLoopBlocks(Loop, Blocks);
DEBUG({ dbgs() << " "; print(Blocks, dbgs()); });
@ -320,7 +320,7 @@ const MachineLoop *SplitAnalysis::getBestSplitLoop() {
SlotIndex BestIdx;
for (LoopPtrSet::const_iterator I = Loops.begin(), E = Loops.end(); I != E;
++I) {
SlotIndex Idx = lis_.getMBBStartIdx((*I)->getHeader());
SlotIndex Idx = LIS.getMBBStartIdx((*I)->getHeader());
if (!Best || Idx < BestIdx)
Best = *I, BestIdx = Idx;
}
@ -328,25 +328,25 @@ const MachineLoop *SplitAnalysis::getBestSplitLoop() {
return Best;
}
/// isBypassLoop - Return true if curli is live through Loop and has no uses
/// isBypassLoop - Return true if CurLI is live through Loop and has no uses
/// inside the loop. Bypass loops are candidates for splitting because it can
/// prevent interference inside the loop.
bool SplitAnalysis::isBypassLoop(const MachineLoop *Loop) {
// If curli is live into the loop header and there are no uses in the loop, it
// If CurLI is live into the loop header and there are no uses in the loop, it
// must be live in the entire loop and live on at least one exiting edge.
return !usingLoops_.count(Loop) &&
lis_.isLiveInToMBB(*curli_, Loop->getHeader());
return !UsingLoops.count(Loop) &&
LIS.isLiveInToMBB(*CurLI, Loop->getHeader());
}
/// getBypassLoops - Get all the maximal bypass loops. These are the bypass
/// loops whose parent is not a bypass loop.
void SplitAnalysis::getBypassLoops(LoopPtrSet &BypassLoops) {
SmallVector<MachineLoop*, 8> Todo(loops_.begin(), loops_.end());
SmallVector<MachineLoop*, 8> Todo(Loops.begin(), Loops.end());
while (!Todo.empty()) {
MachineLoop *Loop = Todo.pop_back_val();
if (!usingLoops_.count(Loop)) {
if (!UsingLoops.count(Loop)) {
// This is either a bypass loop or completely irrelevant.
if (lis_.isLiveInToMBB(*curli_, Loop->getHeader()))
if (LIS.isLiveInToMBB(*CurLI, Loop->getHeader()))
BypassLoops.insert(Loop);
// Either way, skip the child loops.
continue;
@ -370,26 +370,26 @@ makeVV(const VNInfo *a, VNInfo *b) {
}
void LiveIntervalMap::reset(LiveInterval *li) {
li_ = li;
valueMap_.clear();
liveOutCache_.clear();
LI = li;
Values.clear();
LiveOutCache.clear();
}
bool LiveIntervalMap::isComplexMapped(const VNInfo *ParentVNI) const {
ValueMap::const_iterator i = valueMap_.find(ParentVNI);
return i != valueMap_.end() && i->second == 0;
ValueMap::const_iterator i = Values.find(ParentVNI);
return i != Values.end() && i->second == 0;
}
// defValue - Introduce a li_ def for ParentVNI that could be later than
// defValue - Introduce a LI def for ParentVNI that could be later than
// ParentVNI->def.
VNInfo *LiveIntervalMap::defValue(const VNInfo *ParentVNI, SlotIndex Idx) {
assert(li_ && "call reset first");
assert(LI && "call reset first");
assert(ParentVNI && "Mapping NULL value");
assert(Idx.isValid() && "Invalid SlotIndex");
assert(parentli_.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
// Create a new value.
VNInfo *VNI = li_->getNextValue(Idx, 0, lis_.getVNInfoAllocator());
VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
// Preserve the PHIDef bit.
if (ParentVNI->isPHIDef() && Idx == ParentVNI->def)
@ -397,7 +397,7 @@ VNInfo *LiveIntervalMap::defValue(const VNInfo *ParentVNI, SlotIndex Idx) {
// Use insert for lookup, so we can add missing values with a second lookup.
std::pair<ValueMap::iterator,bool> InsP =
valueMap_.insert(makeVV(ParentVNI, Idx == ParentVNI->def ? VNI : 0));
Values.insert(makeVV(ParentVNI, Idx == ParentVNI->def ? VNI : 0));
// This is now a complex def. Mark with a NULL in valueMap.
if (!InsP.second)
@ -411,20 +411,20 @@ VNInfo *LiveIntervalMap::defValue(const VNInfo *ParentVNI, SlotIndex Idx) {
// Potentially create phi-def values.
VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
bool *simple) {
assert(li_ && "call reset first");
assert(LI && "call reset first");
assert(ParentVNI && "Mapping NULL value");
assert(Idx.isValid() && "Invalid SlotIndex");
assert(parentli_.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
// Use insert for lookup, so we can add missing values with a second lookup.
std::pair<ValueMap::iterator,bool> InsP =
valueMap_.insert(makeVV(ParentVNI, 0));
Values.insert(makeVV(ParentVNI, 0));
// This was an unknown value. Create a simple mapping.
if (InsP.second) {
if (simple) *simple = true;
return InsP.first->second = li_->createValueCopy(ParentVNI,
lis_.getVNInfoAllocator());
return InsP.first->second = LI->createValueCopy(ParentVNI,
LIS.getVNInfoAllocator());
}
// This was a simple mapped value.
@ -436,7 +436,7 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
// This is a complex mapped value. There may be multiple defs, and we may need
// to create phi-defs.
if (simple) *simple = false;
MachineBasicBlock *IdxMBB = lis_.getMBBFromIndex(Idx);
MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
assert(IdxMBB && "No MBB at Idx");
// Is there a def in the same MBB we can extend?
@ -448,14 +448,14 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
// Perform a search for all predecessor blocks where we know the dominating
// VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
DEBUG(dbgs() << "\n Reaching defs for BB#" << IdxMBB->getNumber()
<< " at " << Idx << " in " << *li_ << '\n');
<< " at " << Idx << " in " << *LI << '\n');
DEBUG(dumpCache());
// Blocks where li_ should be live-in.
// Blocks where LI should be live-in.
SmallVector<MachineDomTreeNode*, 16> LiveIn;
LiveIn.push_back(mdt_[IdxMBB]);
LiveIn.push_back(MDT[IdxMBB]);
// Using liveOutCache_ as a visited set, perform a BFS for all reaching defs.
// Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
for (unsigned i = 0; i != LiveIn.size(); ++i) {
MachineBasicBlock *MBB = LiveIn[i]->getBlock();
for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
@ -463,7 +463,7 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
MachineBasicBlock *Pred = *PI;
// Is this a known live-out block?
std::pair<LiveOutMap::iterator,bool> LOIP =
liveOutCache_.insert(std::make_pair(Pred, LiveOutPair()));
LiveOutCache.insert(std::make_pair(Pred, LiveOutPair()));
// Yes, we have been here before.
if (!LOIP.second) {
DEBUG(if (VNInfo *VNI = LOIP.first->second.first)
@ -473,20 +473,20 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
}
// Does Pred provide a live-out value?
SlotIndex Last = lis_.getMBBEndIdx(Pred).getPrevSlot();
SlotIndex Last = LIS.getMBBEndIdx(Pred).getPrevSlot();
if (VNInfo *VNI = extendTo(Pred, Last)) {
MachineBasicBlock *DefMBB = lis_.getMBBFromIndex(VNI->def);
MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(VNI->def);
DEBUG(dbgs() << " found valno #" << VNI->id
<< " from BB#" << DefMBB->getNumber()
<< " at BB#" << Pred->getNumber() << '\n');
LiveOutPair &LOP = LOIP.first->second;
LOP.first = VNI;
LOP.second = mdt_[DefMBB];
LOP.second = MDT[DefMBB];
continue;
}
// No, we need a live-in value for Pred as well
if (Pred != IdxMBB)
LiveIn.push_back(mdt_[Pred]);
LiveIn.push_back(MDT[Pred]);
}
}
@ -512,8 +512,8 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
// Get the IDom live-out value.
if (!needPHI) {
LiveOutMap::iterator I = liveOutCache_.find(IDom->getBlock());
if (I != liveOutCache_.end())
LiveOutMap::iterator I = LiveOutCache.find(IDom->getBlock());
if (I != LiveOutCache.end())
IDomValue = I->second;
else
// If IDom is outside our set of live-out blocks, there must be new
@ -527,13 +527,13 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
if (!needPHI) {
for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
PE = MBB->pred_end(); PI != PE; ++PI) {
LiveOutPair Value = liveOutCache_[*PI];
LiveOutPair Value = LiveOutCache[*PI];
if (!Value.first || Value.first == IDomValue.first)
continue;
// This predecessor is carrying something other than IDomValue.
// It could be because IDomValue hasn't propagated yet, or it could be
// because MBB is in the dominance frontier of that value.
if (mdt_.dominates(IDom, Value.second)) {
if (MDT.dominates(IDom, Value.second)) {
needPHI = true;
break;
}
@ -543,25 +543,25 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
// Create a phi-def if required.
if (needPHI) {
++Changes;
SlotIndex Start = lis_.getMBBStartIdx(MBB);
VNInfo *VNI = li_->getNextValue(Start, 0, lis_.getVNInfoAllocator());
SlotIndex Start = LIS.getMBBStartIdx(MBB);
VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
VNI->setIsPHIDef(true);
DEBUG(dbgs() << " - BB#" << MBB->getNumber()
<< " phi-def #" << VNI->id << " at " << Start << '\n');
// We no longer need li_ to be live-in.
// We no longer need LI to be live-in.
LiveIn.erase(LiveIn.begin()+(i-1));
// Blocks in LiveIn are either IdxMBB, or have a value live-through.
if (MBB == IdxMBB)
IdxVNI = VNI;
// Check if we need to update live-out info.
LiveOutMap::iterator I = liveOutCache_.find(MBB);
if (I == liveOutCache_.end() || I->second.second == Node) {
LiveOutMap::iterator I = LiveOutCache.find(MBB);
if (I == LiveOutCache.end() || I->second.second == Node) {
// We already have a live-out defined in MBB, so this must be IdxMBB.
assert(MBB == IdxMBB && "Adding phi-def to known live-out");
li_->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
} else {
// This phi-def is also live-out, so color the whole block.
li_->addRange(LiveRange(Start, lis_.getMBBEndIdx(MBB), VNI));
LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
I->second = LiveOutPair(VNI, Node);
}
} else if (IDomValue.first) {
@ -570,8 +570,8 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
IdxVNI = IDomValue.first;
// Propagate IDomValue if needed:
// MBB is live-out and doesn't define its own value.
LiveOutMap::iterator I = liveOutCache_.find(MBB);
if (I != liveOutCache_.end() && I->second.second != Node &&
LiveOutMap::iterator I = LiveOutCache.find(MBB);
if (I != LiveOutCache.end() && I->second.second != Node &&
I->second.first != IDomValue.first) {
++Changes;
I->second = IDomValue;
@ -588,8 +588,8 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
#ifndef NDEBUG
DEBUG(dumpCache());
// Check the liveOutCache_ invariants.
for (LiveOutMap::iterator I = liveOutCache_.begin(), E = liveOutCache_.end();
// Check the LiveOutCache invariants.
for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
I != E; ++I) {
assert(I->first && "Null MBB entry in cache");
assert(I->second.first && "Null VNInfo in cache");
@ -598,7 +598,7 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
continue;
for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(),
PE = I->first->pred_end(); PI != PE; ++PI)
assert(liveOutCache_.lookup(*PI) == I->second && "Bad invariant");
assert(LiveOutCache.lookup(*PI) == I->second && "Bad invariant");
}
#endif
@ -608,15 +608,15 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
// This makes the next mapValue call much faster.
for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
MachineBasicBlock *MBB = LiveIn[i]->getBlock();
SlotIndex Start = lis_.getMBBStartIdx(MBB);
SlotIndex Start = LIS.getMBBStartIdx(MBB);
if (MBB == IdxMBB) {
li_->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
continue;
}
// Anything in LiveIn other than IdxMBB is live-through.
VNInfo *VNI = liveOutCache_.lookup(MBB).first;
VNInfo *VNI = LiveOutCache.lookup(MBB).first;
assert(VNI && "Missing block value");
li_->addRange(LiveRange(Start, lis_.getMBBEndIdx(MBB), VNI));
LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
}
return IdxVNI;
@ -624,7 +624,7 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
#ifndef NDEBUG
void LiveIntervalMap::dumpCache() {
for (LiveOutMap::iterator I = liveOutCache_.begin(), E = liveOutCache_.end();
for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
I != E; ++I) {
assert(I->first && "Null MBB entry in cache");
assert(I->second.first && "Null VNInfo in cache");
@ -637,70 +637,70 @@ void LiveIntervalMap::dumpCache() {
dbgs() << " BB#" << (*PI)->getNumber();
dbgs() << '\n';
}
dbgs() << " cache: " << liveOutCache_.size() << " entries.\n";
dbgs() << " cache: " << LiveOutCache.size() << " entries.\n";
}
#endif
// extendTo - Find the last li_ value defined in MBB at or before Idx. The
// parentli_ is assumed to be live at Idx. Extend the live range to Idx.
// extendTo - Find the last LI value defined in MBB at or before Idx. The
// ParentLI is assumed to be live at Idx. Extend the live range to Idx.
// Return the found VNInfo, or NULL.
VNInfo *LiveIntervalMap::extendTo(const MachineBasicBlock *MBB, SlotIndex Idx) {
assert(li_ && "call reset first");
LiveInterval::iterator I = std::upper_bound(li_->begin(), li_->end(), Idx);
if (I == li_->begin())
assert(LI && "call reset first");
LiveInterval::iterator I = std::upper_bound(LI->begin(), LI->end(), Idx);
if (I == LI->begin())
return 0;
--I;
if (I->end <= lis_.getMBBStartIdx(MBB))
if (I->end <= LIS.getMBBStartIdx(MBB))
return 0;
if (I->end <= Idx)
I->end = Idx.getNextSlot();
return I->valno;
}
// addSimpleRange - Add a simple range from parentli_ to li_.
// addSimpleRange - Add a simple range from ParentLI to LI.
// ParentVNI must be live in the [Start;End) interval.
void LiveIntervalMap::addSimpleRange(SlotIndex Start, SlotIndex End,
const VNInfo *ParentVNI) {
assert(li_ && "call reset first");
assert(LI && "call reset first");
bool simple;
VNInfo *VNI = mapValue(ParentVNI, Start, &simple);
// A simple mapping is easy.
if (simple) {
li_->addRange(LiveRange(Start, End, VNI));
LI->addRange(LiveRange(Start, End, VNI));
return;
}
// ParentVNI is a complex value. We must map per MBB.
MachineFunction::iterator MBB = lis_.getMBBFromIndex(Start);
MachineFunction::iterator MBBE = lis_.getMBBFromIndex(End.getPrevSlot());
MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
MachineFunction::iterator MBBE = LIS.getMBBFromIndex(End.getPrevSlot());
if (MBB == MBBE) {
li_->addRange(LiveRange(Start, End, VNI));
LI->addRange(LiveRange(Start, End, VNI));
return;
}
// First block.
li_->addRange(LiveRange(Start, lis_.getMBBEndIdx(MBB), VNI));
LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
// Run sequence of full blocks.
for (++MBB; MBB != MBBE; ++MBB) {
Start = lis_.getMBBStartIdx(MBB);
li_->addRange(LiveRange(Start, lis_.getMBBEndIdx(MBB),
Start = LIS.getMBBStartIdx(MBB);
LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB),
mapValue(ParentVNI, Start)));
}
// Final block.
Start = lis_.getMBBStartIdx(MBB);
Start = LIS.getMBBStartIdx(MBB);
if (Start != End)
li_->addRange(LiveRange(Start, End, mapValue(ParentVNI, Start)));
LI->addRange(LiveRange(Start, End, mapValue(ParentVNI, Start)));
}
/// addRange - Add live ranges to li_ where [Start;End) intersects parentli_.
/// addRange - Add live ranges to LI where [Start;End) intersects ParentLI.
/// All needed values whose def is not inside [Start;End) must be defined
/// beforehand so mapValue will work.
void LiveIntervalMap::addRange(SlotIndex Start, SlotIndex End) {
assert(li_ && "call reset first");
LiveInterval::const_iterator B = parentli_.begin(), E = parentli_.end();
assert(LI && "call reset first");
LiveInterval::const_iterator B = ParentLI.begin(), E = ParentLI.end();
LiveInterval::const_iterator I = std::lower_bound(B, E, Start);
// Check if --I begins before Start and overlaps.
@ -727,22 +727,22 @@ SplitEditor::SplitEditor(SplitAnalysis &sa,
VirtRegMap &vrm,
MachineDominatorTree &mdt,
LiveRangeEdit &edit)
: sa_(sa), lis_(lis), vrm_(vrm),
mri_(vrm.getMachineFunction().getRegInfo()),
tii_(*vrm.getMachineFunction().getTarget().getInstrInfo()),
tri_(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
edit_(edit),
dupli_(lis_, mdt, edit.getParent()),
openli_(lis_, mdt, edit.getParent())
: sa_(sa), LIS(lis), VRM(vrm),
MRI(vrm.getMachineFunction().getRegInfo()),
TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
Edit(edit),
DupLI(LIS, mdt, edit.getParent()),
OpenLI(LIS, mdt, edit.getParent())
{
// We don't need an AliasAnalysis since we will only be performing
// cheap-as-a-copy remats anyway.
edit_.anyRematerializable(lis_, tii_, 0);
Edit.anyRematerializable(LIS, TII, 0);
}
bool SplitEditor::intervalsLiveAt(SlotIndex Idx) const {
for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; ++I)
if (*I != dupli_.getLI() && (*I)->liveAt(Idx))
for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
if (*I != DupLI.getLI() && (*I)->liveAt(Idx))
return true;
return false;
}
@ -758,14 +758,14 @@ VNInfo *SplitEditor::defFromParent(LiveIntervalMap &Reg,
// Attempt cheap-as-a-copy rematerialization.
LiveRangeEdit::Remat RM(ParentVNI);
if (edit_.canRematerializeAt(RM, UseIdx, true, lis_)) {
Def = edit_.rematerializeAt(MBB, I, Reg.getLI()->reg, RM,
lis_, tii_, tri_);
if (Edit.canRematerializeAt(RM, UseIdx, true, LIS)) {
Def = Edit.rematerializeAt(MBB, I, Reg.getLI()->reg, RM,
LIS, TII, TRI);
} else {
// Can't remat, just insert a copy from parent.
CopyMI = BuildMI(MBB, I, DebugLoc(), tii_.get(TargetOpcode::COPY),
Reg.getLI()->reg).addReg(edit_.getReg());
Def = lis_.InsertMachineInstrInMaps(CopyMI).getDefIndex();
CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY),
Reg.getLI()->reg).addReg(Edit.getReg());
Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
}
// Define the value in Reg.
@ -781,121 +781,121 @@ VNInfo *SplitEditor::defFromParent(LiveIntervalMap &Reg,
/// Create a new virtual register and live interval.
void SplitEditor::openIntv() {
assert(!openli_.getLI() && "Previous LI not closed before openIntv");
if (!dupli_.getLI())
dupli_.reset(&edit_.create(mri_, lis_, vrm_));
assert(!OpenLI.getLI() && "Previous LI not closed before openIntv");
if (!DupLI.getLI())
DupLI.reset(&Edit.create(MRI, LIS, VRM));
openli_.reset(&edit_.create(mri_, lis_, vrm_));
OpenLI.reset(&Edit.create(MRI, LIS, VRM));
}
/// enterIntvBefore - Enter openli before the instruction at Idx. If curli is
/// enterIntvBefore - Enter OpenLI before the instruction at Idx. If CurLI is
/// not live before Idx, a COPY is not inserted.
void SplitEditor::enterIntvBefore(SlotIndex Idx) {
assert(openli_.getLI() && "openIntv not called before enterIntvBefore");
assert(OpenLI.getLI() && "openIntv not called before enterIntvBefore");
Idx = Idx.getUseIndex();
DEBUG(dbgs() << " enterIntvBefore " << Idx);
VNInfo *ParentVNI = edit_.getParent().getVNInfoAt(Idx);
VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
if (!ParentVNI) {
DEBUG(dbgs() << ": not live\n");
return;
}
DEBUG(dbgs() << ": valno " << ParentVNI->id);
truncatedValues.insert(ParentVNI);
MachineInstr *MI = lis_.getInstructionFromIndex(Idx);
MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
assert(MI && "enterIntvBefore called with invalid index");
defFromParent(openli_, ParentVNI, Idx, *MI->getParent(), MI);
defFromParent(OpenLI, ParentVNI, Idx, *MI->getParent(), MI);
DEBUG(dbgs() << ": " << *openli_.getLI() << '\n');
DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n');
}
/// enterIntvAtEnd - Enter openli at the end of MBB.
/// enterIntvAtEnd - Enter OpenLI at the end of MBB.
void SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
assert(openli_.getLI() && "openIntv not called before enterIntvAtEnd");
SlotIndex End = lis_.getMBBEndIdx(&MBB).getPrevSlot();
assert(OpenLI.getLI() && "openIntv not called before enterIntvAtEnd");
SlotIndex End = LIS.getMBBEndIdx(&MBB).getPrevSlot();
DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << End);
VNInfo *ParentVNI = edit_.getParent().getVNInfoAt(End);
VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(End);
if (!ParentVNI) {
DEBUG(dbgs() << ": not live\n");
return;
}
DEBUG(dbgs() << ": valno " << ParentVNI->id);
truncatedValues.insert(ParentVNI);
defFromParent(openli_, ParentVNI, End, MBB, MBB.getFirstTerminator());
DEBUG(dbgs() << ": " << *openli_.getLI() << '\n');
defFromParent(OpenLI, ParentVNI, End, MBB, MBB.getFirstTerminator());
DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n');
}
/// useIntv - indicate that all instructions in MBB should use openli.
/// useIntv - indicate that all instructions in MBB should use OpenLI.
void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
useIntv(lis_.getMBBStartIdx(&MBB), lis_.getMBBEndIdx(&MBB));
useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
}
void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
assert(openli_.getLI() && "openIntv not called before useIntv");
openli_.addRange(Start, End);
assert(OpenLI.getLI() && "openIntv not called before useIntv");
OpenLI.addRange(Start, End);
DEBUG(dbgs() << " use [" << Start << ';' << End << "): "
<< *openli_.getLI() << '\n');
<< *OpenLI.getLI() << '\n');
}
/// leaveIntvAfter - Leave openli after the instruction at Idx.
/// leaveIntvAfter - Leave OpenLI after the instruction at Idx.
void SplitEditor::leaveIntvAfter(SlotIndex Idx) {
assert(openli_.getLI() && "openIntv not called before leaveIntvAfter");
assert(OpenLI.getLI() && "openIntv not called before leaveIntvAfter");
DEBUG(dbgs() << " leaveIntvAfter " << Idx);
// The interval must be live beyond the instruction at Idx.
Idx = Idx.getBoundaryIndex();
VNInfo *ParentVNI = edit_.getParent().getVNInfoAt(Idx);
VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
if (!ParentVNI) {
DEBUG(dbgs() << ": not live\n");
return;
}
DEBUG(dbgs() << ": valno " << ParentVNI->id);
MachineBasicBlock::iterator MII = lis_.getInstructionFromIndex(Idx);
VNInfo *VNI = defFromParent(dupli_, ParentVNI, Idx,
MachineBasicBlock::iterator MII = LIS.getInstructionFromIndex(Idx);
VNInfo *VNI = defFromParent(DupLI, ParentVNI, Idx,
*MII->getParent(), llvm::next(MII));
// Make sure that openli is properly extended from Idx to the new copy.
// Make sure that OpenLI is properly extended from Idx to the new copy.
// FIXME: This shouldn't be necessary for remats.
openli_.addSimpleRange(Idx, VNI->def, ParentVNI);
OpenLI.addSimpleRange(Idx, VNI->def, ParentVNI);
DEBUG(dbgs() << ": " << *openli_.getLI() << '\n');
DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n');
}
/// leaveIntvAtTop - Leave the interval at the top of MBB.
/// Currently, only one value can leave the interval.
void SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
assert(openli_.getLI() && "openIntv not called before leaveIntvAtTop");
SlotIndex Start = lis_.getMBBStartIdx(&MBB);
assert(OpenLI.getLI() && "openIntv not called before leaveIntvAtTop");
SlotIndex Start = LIS.getMBBStartIdx(&MBB);
DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
VNInfo *ParentVNI = edit_.getParent().getVNInfoAt(Start);
VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Start);
if (!ParentVNI) {
DEBUG(dbgs() << ": not live\n");
return;
}
VNInfo *VNI = defFromParent(dupli_, ParentVNI, Start, MBB,
VNInfo *VNI = defFromParent(DupLI, ParentVNI, Start, MBB,
MBB.SkipPHIsAndLabels(MBB.begin()));
// Finally we must make sure that openli is properly extended from Start to
// Finally we must make sure that OpenLI is properly extended from Start to
// the new copy.
openli_.addSimpleRange(Start, VNI->def, ParentVNI);
DEBUG(dbgs() << ": " << *openli_.getLI() << '\n');
OpenLI.addSimpleRange(Start, VNI->def, ParentVNI);
DEBUG(dbgs() << ": " << *OpenLI.getLI() << '\n');
}
/// closeIntv - Indicate that we are done editing the currently open
/// LiveInterval, and ranges can be trimmed.
void SplitEditor::closeIntv() {
assert(openli_.getLI() && "openIntv not called before closeIntv");
DEBUG(dbgs() << " closeIntv " << *openli_.getLI() << '\n');
openli_.reset(0);
assert(OpenLI.getLI() && "openIntv not called before closeIntv");
DEBUG(dbgs() << " closeIntv " << *OpenLI.getLI() << '\n');
OpenLI.reset(0);
}
/// rewrite - Rewrite all uses of reg to use the new registers.
void SplitEditor::rewrite(unsigned reg) {
for (MachineRegisterInfo::reg_iterator RI = mri_.reg_begin(reg),
RE = mri_.reg_end(); RI != RE;) {
for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(reg),
RE = MRI.reg_end(); RI != RE;) {
MachineOperand &MO = RI.getOperand();
unsigned OpNum = RI.getOperandNo();
MachineInstr *MI = MO.getParent();
@ -906,10 +906,10 @@ void SplitEditor::rewrite(unsigned reg) {
MO.setReg(0);
continue;
}
SlotIndex Idx = lis_.getInstructionIndex(MI);
SlotIndex Idx = LIS.getInstructionIndex(MI);
Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
LiveInterval *LI = 0;
for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E;
for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E;
++I) {
LiveInterval *testli = *I;
if (testli->liveAt(Idx)) {
@ -932,9 +932,9 @@ SplitEditor::addTruncSimpleRange(SlotIndex Start, SlotIndex End, VNInfo *VNI) {
typedef std::pair<LiveInterval::const_iterator,
LiveInterval::const_iterator> IIPair;
SmallVector<IIPair, 8> Iters;
for (LiveRangeEdit::iterator LI = edit_.begin(), LE = edit_.end(); LI != LE;
for (LiveRangeEdit::iterator LI = Edit.begin(), LE = Edit.end(); LI != LE;
++LI) {
if (*LI == dupli_.getLI())
if (*LI == DupLI.getLI())
continue;
LiveInterval::const_iterator I = (*LI)->find(Start);
LiveInterval::const_iterator E = (*LI)->end();
@ -968,7 +968,7 @@ SplitEditor::addTruncSimpleRange(SlotIndex Start, SlotIndex End, VNInfo *VNI) {
}
// Now, [sidx;eidx) doesn't overlap anything in intervals_.
if (sidx < eidx)
dupli_.addSimpleRange(sidx, eidx, VNI);
DupLI.addSimpleRange(sidx, eidx, VNI);
// If the interval end was truncated, we can try again from next.
if (next <= sidx)
break;
@ -983,13 +983,13 @@ void SplitEditor::computeRemainder() {
// If values were partially rematted, we should shrink to uses.
// If values were fully rematted, they should be omitted.
// FIXME: If a single value is redefined, just move the def and truncate.
LiveInterval &parent = edit_.getParent();
LiveInterval &parent = Edit.getParent();
DEBUG(dbgs() << "computeRemainder from " << parent << '\n');
// Values that are fully contained in the split intervals.
SmallPtrSet<const VNInfo*, 8> deadValues;
// Map all curli values that should have live defs in dupli.
// Map all CurLI values that should have live defs in dupli.
for (LiveInterval::const_vni_iterator I = parent.vni_begin(),
E = parent.vni_end(); I != E; ++I) {
const VNInfo *VNI = *I;
@ -999,15 +999,15 @@ void SplitEditor::computeRemainder() {
// Original def is contained in the split intervals.
if (intervalsLiveAt(VNI->def)) {
// Did this value escape?
if (dupli_.isMapped(VNI))
if (DupLI.isMapped(VNI))
truncatedValues.insert(VNI);
else
deadValues.insert(VNI);
continue;
}
// Add minimal live range at the definition.
VNInfo *DVNI = dupli_.defValue(VNI, VNI->def);
dupli_.getLI()->addRange(LiveRange(VNI->def, VNI->def.getNextSlot(), DVNI));
VNInfo *DVNI = DupLI.defValue(VNI, VNI->def);
DupLI.getLI()->addRange(LiveRange(VNI->def, VNI->def.getNextSlot(), DVNI));
}
// Add all ranges to dupli.
@ -1019,40 +1019,40 @@ void SplitEditor::computeRemainder() {
addTruncSimpleRange(LR.start, LR.end, LR.valno);
} else if (!deadValues.count(LR.valno)) {
// recolor without truncation.
dupli_.addSimpleRange(LR.start, LR.end, LR.valno);
DupLI.addSimpleRange(LR.start, LR.end, LR.valno);
}
}
// Extend dupli_ to be live out of any critical loop predecessors.
// Extend DupLI to be live out of any critical loop predecessors.
// This means we have multiple registers live out of those blocks.
// The alternative would be to split the critical edges.
if (criticalPreds_.empty())
return;
for (SplitAnalysis::BlockPtrSet::iterator I = criticalPreds_.begin(),
E = criticalPreds_.end(); I != E; ++I)
dupli_.extendTo(*I, lis_.getMBBEndIdx(*I).getPrevSlot());
DupLI.extendTo(*I, LIS.getMBBEndIdx(*I).getPrevSlot());
criticalPreds_.clear();
}
void SplitEditor::finish() {
assert(!openli_.getLI() && "Previous LI not closed before rewrite");
assert(dupli_.getLI() && "No dupli for rewrite. Noop spilt?");
assert(!OpenLI.getLI() && "Previous LI not closed before rewrite");
assert(DupLI.getLI() && "No dupli for rewrite. Noop spilt?");
// Complete dupli liveness.
computeRemainder();
// Get rid of unused values and set phi-kill flags.
for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; ++I)
(*I)->RenumberValues(lis_);
for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
(*I)->RenumberValues(LIS);
// Rewrite instructions.
rewrite(edit_.getReg());
rewrite(Edit.getReg());
// Now check if any registers were separated into multiple components.
ConnectedVNInfoEqClasses ConEQ(lis_);
for (unsigned i = 0, e = edit_.size(); i != e; ++i) {
ConnectedVNInfoEqClasses ConEQ(LIS);
for (unsigned i = 0, e = Edit.size(); i != e; ++i) {
// Don't use iterators, they are invalidated by create() below.
LiveInterval *li = edit_.get(i);
LiveInterval *li = Edit.get(i);
unsigned NumComp = ConEQ.Classify(li);
if (NumComp <= 1)
continue;
@ -1060,19 +1060,19 @@ void SplitEditor::finish() {
SmallVector<LiveInterval*, 8> dups;
dups.push_back(li);
for (unsigned i = 1; i != NumComp; ++i)
dups.push_back(&edit_.create(mri_, lis_, vrm_));
dups.push_back(&Edit.create(MRI, LIS, VRM));
ConEQ.Distribute(&dups[0]);
// Rewrite uses to the new regs.
rewrite(li->reg);
}
// Calculate spill weight and allocation hints for new intervals.
VirtRegAuxInfo vrai(vrm_.getMachineFunction(), lis_, sa_.loops_);
for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; ++I){
VirtRegAuxInfo vrai(VRM.getMachineFunction(), LIS, sa_.Loops);
for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I){
LiveInterval &li = **I;
vrai.CalculateRegClass(li.reg);
vrai.CalculateWeightAndHint(li);
DEBUG(dbgs() << " new interval " << mri_.getRegClass(li.reg)->getName()
DEBUG(dbgs() << " new interval " << MRI.getRegClass(li.reg)->getName()
<< ":" << li << '\n');
}
}
@ -1102,7 +1102,7 @@ void SplitEditor::splitAroundLoop(const MachineLoop *Loop) {
openIntv();
// Insert copies in the predecessors if live-in to the header.
if (lis_.isLiveInToMBB(edit_.getParent(), Loop->getHeader())) {
if (LIS.isLiveInToMBB(Edit.getParent(), Loop->getHeader())) {
for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Preds.begin(),
E = Blocks.Preds.end(); I != E; ++I) {
MachineBasicBlock &MBB = const_cast<MachineBasicBlock&>(**I);
@ -1132,27 +1132,27 @@ void SplitEditor::splitAroundLoop(const MachineLoop *Loop) {
// Single Block Splitting
//===----------------------------------------------------------------------===//
/// getMultiUseBlocks - if curli has more than one use in a basic block, it
/// may be an advantage to split curli for the duration of the block.
/// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
/// may be an advantage to split CurLI for the duration of the block.
bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
// If curli is local to one block, there is no point to splitting it.
if (usingBlocks_.size() <= 1)
// If CurLI is local to one block, there is no point to splitting it.
if (UsingBlocks.size() <= 1)
return false;
// Add blocks with multiple uses.
for (BlockCountMap::iterator I = usingBlocks_.begin(), E = usingBlocks_.end();
for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end();
I != E; ++I)
switch (I->second) {
case 0:
case 1:
continue;
case 2: {
// When there are only two uses and curli is both live in and live out,
// When there are only two uses and CurLI is both live in and live out,
// we don't really win anything by isolating the block since we would be
// inserting two copies.
// The remaing register would still have two uses in the block. (Unless it
// separates into disconnected components).
if (lis_.isLiveInToMBB(*curli_, I->first) &&
lis_.isLiveOutOfMBB(*curli_, I->first))
if (LIS.isLiveInToMBB(*CurLI, I->first) &&
LIS.isLiveOutOfMBB(*CurLI, I->first))
continue;
} // Fall through.
default:
@ -1161,20 +1161,20 @@ bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
return !Blocks.empty();
}
/// splitSingleBlocks - Split curli into a separate live interval inside each
/// splitSingleBlocks - Split CurLI into a separate live interval inside each
/// basic block in Blocks.
void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
// Determine the first and last instruction using curli in each block.
// Determine the first and last instruction using CurLI in each block.
typedef std::pair<SlotIndex,SlotIndex> IndexPair;
typedef DenseMap<const MachineBasicBlock*,IndexPair> IndexPairMap;
IndexPairMap MBBRange;
for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.usingInstrs_.begin(),
E = sa_.usingInstrs_.end(); I != E; ++I) {
for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(),
E = sa_.UsingInstrs.end(); I != E; ++I) {
const MachineBasicBlock *MBB = (*I)->getParent();
if (!Blocks.count(MBB))
continue;
SlotIndex Idx = lis_.getInstructionIndex(*I);
SlotIndex Idx = LIS.getInstructionIndex(*I);
DEBUG(dbgs() << " BB#" << MBB->getNumber() << '\t' << Idx << '\t' << **I);
IndexPair &IP = MBBRange[MBB];
if (!IP.first.isValid() || Idx < IP.first)
@ -1205,29 +1205,29 @@ void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
// Sub Block Splitting
//===----------------------------------------------------------------------===//
/// getBlockForInsideSplit - If curli is contained inside a single basic block,
/// getBlockForInsideSplit - If CurLI is contained inside a single basic block,
/// and it wou pay to subdivide the interval inside that block, return it.
/// Otherwise return NULL. The returned block can be passed to
/// SplitEditor::splitInsideBlock.
const MachineBasicBlock *SplitAnalysis::getBlockForInsideSplit() {
// The interval must be exclusive to one block.
if (usingBlocks_.size() != 1)
if (UsingBlocks.size() != 1)
return 0;
// Don't to this for less than 4 instructions. We want to be sure that
// splitting actually reduces the instruction count per interval.
if (usingInstrs_.size() < 4)
if (UsingInstrs.size() < 4)
return 0;
return usingBlocks_.begin()->first;
return UsingBlocks.begin()->first;
}
/// splitInsideBlock - Split curli into multiple intervals inside MBB.
/// splitInsideBlock - Split CurLI into multiple intervals inside MBB.
void SplitEditor::splitInsideBlock(const MachineBasicBlock *MBB) {
SmallVector<SlotIndex, 32> Uses;
Uses.reserve(sa_.usingInstrs_.size());
for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.usingInstrs_.begin(),
E = sa_.usingInstrs_.end(); I != E; ++I)
Uses.reserve(sa_.UsingInstrs.size());
for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(),
E = sa_.UsingInstrs.end(); I != E; ++I)
if ((*I)->getParent() == MBB)
Uses.push_back(lis_.getInstructionIndex(*I));
Uses.push_back(LIS.getInstructionIndex(*I));
DEBUG(dbgs() << " splitInsideBlock BB#" << MBB->getNumber() << " for "
<< Uses.size() << " instructions.\n");
assert(Uses.size() >= 3 && "Need at least 3 instructions");

152
lib/CodeGen/SplitKit.h
View File

@ -41,31 +41,31 @@ typedef DomTreeNodeBase<MachineBasicBlock> MachineDomTreeNode;
/// opportunities.
class SplitAnalysis {
public:
const MachineFunction &mf_;
const LiveIntervals &lis_;
const MachineLoopInfo &loops_;
const TargetInstrInfo &tii_;
const MachineFunction &MF;
const LiveIntervals &LIS;
const MachineLoopInfo &Loops;
const TargetInstrInfo &TII;
// Instructions using the the current register.
typedef SmallPtrSet<const MachineInstr*, 16> InstrPtrSet;
InstrPtrSet usingInstrs_;
InstrPtrSet UsingInstrs;
// Sorted slot indexes of using instructions.
SmallVector<SlotIndex, 8> UseSlots;
// The number of instructions using curli in each basic block.
// The number of instructions using CurLI in each basic block.
typedef DenseMap<const MachineBasicBlock*, unsigned> BlockCountMap;
BlockCountMap usingBlocks_;
BlockCountMap UsingBlocks;
// The number of basic block using curli in each loop.
// The number of basic block using CurLI in each loop.
typedef DenseMap<const MachineLoop*, unsigned> LoopCountMap;
LoopCountMap usingLoops_;
LoopCountMap UsingLoops;
private:
// Current live interval.
const LiveInterval *curli_;
const LiveInterval *CurLI;
// Sumarize statistics by counting instructions using curli_.
// Sumarize statistics by counting instructions using CurLI.
void analyzeUses();
/// canAnalyzeBranch - Return true if MBB ends in a branch that can be
@ -76,7 +76,7 @@ public:
SplitAnalysis(const MachineFunction &mf, const LiveIntervals &lis,
const MachineLoopInfo &mli);
/// analyze - set curli to the specified interval, and analyze how it may be
/// analyze - set CurLI to the specified interval, and analyze how it may be
/// split.
void analyze(const LiveInterval *li);
@ -84,9 +84,9 @@ public:
/// new interval.
void clear();
/// hasUses - Return true if MBB has any uses of curli.
/// hasUses - Return true if MBB has any uses of CurLI.
bool hasUses(const MachineBasicBlock *MBB) const {
return usingBlocks_.lookup(MBB);
return UsingBlocks.lookup(MBB);
}
typedef SmallPtrSet<const MachineBasicBlock*, 16> BlockPtrSet;
@ -123,12 +123,12 @@ public:
OutsideLoop // Uses outside loop periphery.
};
/// analyzeLoopPeripheralUse - Return an enum describing how curli_ is used in
/// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in
/// and around the Loop.
LoopPeripheralUse analyzeLoopPeripheralUse(const LoopBlocks&);
/// getCriticalExits - It may be necessary to partially break critical edges
/// leaving the loop if an exit block has phi uses of curli. Collect the exit
/// leaving the loop if an exit block has phi uses of CurLI. Collect the exit
/// blocks that need special treatment into CriticalExits.
void getCriticalExits(const LoopBlocks &Blocks, BlockPtrSet &CriticalExits);
@ -138,19 +138,19 @@ public:
BlockPtrSet &CriticalExits);
/// getCriticalPreds - Get the set of loop predecessors with critical edges to
/// blocks outside the loop that have curli live in. We don't have to break
/// blocks outside the loop that have CurLI live in. We don't have to break
/// these edges, but they do require special treatment.
void getCriticalPreds(const LoopBlocks &Blocks, BlockPtrSet &CriticalPreds);
/// getSplitLoops - Get the set of loops that have curli uses and would be
/// getSplitLoops - Get the set of loops that have CurLI uses and would be
/// profitable to split.
void getSplitLoops(LoopPtrSet&);
/// getBestSplitLoop - Return the loop where curli may best be split to a
/// getBestSplitLoop - Return the loop where CurLI may best be split to a
/// separate register, or NULL.
const MachineLoop *getBestSplitLoop();
/// isBypassLoop - Return true if curli is live through Loop and has no uses
/// isBypassLoop - Return true if CurLI is live through Loop and has no uses
/// inside the loop. Bypass loops are candidates for splitting because it can
/// prevent interference inside the loop.
bool isBypassLoop(const MachineLoop *Loop);
@ -160,13 +160,13 @@ public:
void getBypassLoops(LoopPtrSet&);
/// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from
/// having curli split to a new live interval. Return true if Blocks can be
/// having CurLI split to a new live interval. Return true if Blocks can be
/// passed to SplitEditor::splitSingleBlocks.
bool getMultiUseBlocks(BlockPtrSet &Blocks);
/// getBlockForInsideSplit - If curli is contained inside a single basic block,
/// and it wou pay to subdivide the interval inside that block, return it.
/// Otherwise return NULL. The returned block can be passed to
/// getBlockForInsideSplit - If CurLI is contained inside a single basic
/// block, and it would pay to subdivide the interval inside that block,
/// return it. Otherwise return NULL. The returned block can be passed to
/// SplitEditor::splitInsideBlock.
const MachineBasicBlock *getBlockForInsideSplit();
};
@ -176,45 +176,45 @@ public:
/// interval that is a subset. Insert phi-def values as needed. This class is
/// used by SplitEditor to create new smaller LiveIntervals.
///
/// parentli_ is the larger interval, li_ is the subset interval. Every value
/// in li_ corresponds to exactly one value in parentli_, and the live range
/// of the value is contained within the live range of the parentli_ value.
/// Values in parentli_ may map to any number of openli_ values, including 0.
/// ParentLI is the larger interval, LI is the subset interval. Every value
/// in LI corresponds to exactly one value in ParentLI, and the live range
/// of the value is contained within the live range of the ParentLI value.
/// Values in ParentLI may map to any number of OpenLI values, including 0.
class LiveIntervalMap {
LiveIntervals &lis_;
MachineDominatorTree &mdt_;
LiveIntervals &LIS;
MachineDominatorTree &MDT;
// The parent interval is never changed.
const LiveInterval &parentli_;
const LiveInterval &ParentLI;
// The child interval's values are fully contained inside parentli_ values.
LiveInterval *li_;
// The child interval's values are fully contained inside ParentLI values.
LiveInterval *LI;
typedef DenseMap<const VNInfo*, VNInfo*> ValueMap;
// Map parentli_ values to simple values in li_ that are defined at the same
// SlotIndex, or NULL for parentli_ values that have complex li_ defs.
// Map ParentLI values to simple values in LI that are defined at the same
// SlotIndex, or NULL for ParentLI values that have complex LI defs.
// Note there is a difference between values mapping to NULL (complex), and
// values not present (unknown/unmapped).
ValueMap valueMap_;
ValueMap Values;
typedef std::pair<VNInfo*, MachineDomTreeNode*> LiveOutPair;
typedef DenseMap<MachineBasicBlock*,LiveOutPair> LiveOutMap;
// liveOutCache_ - Map each basic block where li_ is live out to the live-out
// LiveOutCache - Map each basic block where LI is live out to the live-out
// value and its defining block. One of these conditions shall be true:
//
// 1. !liveOutCache_.count(MBB)
// 2. liveOutCache_[MBB].second.getNode() == MBB
// 3. forall P in preds(MBB): liveOutCache_[P] == liveOutCache_[MBB]
// 1. !LiveOutCache.count(MBB)
// 2. LiveOutCache[MBB].second.getNode() == MBB
// 3. forall P in preds(MBB): LiveOutCache[P] == LiveOutCache[MBB]
//
// This is only a cache, the values can be computed as:
//
// VNI = li_->getVNInfoAt(lis_.getMBBEndIdx(MBB))
// Node = mbt_[lis_.getMBBFromIndex(VNI->def)]
// VNI = LI->getVNInfoAt(LIS.getMBBEndIdx(MBB))
// Node = mbt_[LIS.getMBBFromIndex(VNI->def)]
//
// The cache is also used as a visiteed set by mapValue().
LiveOutMap liveOutCache_;
LiveOutMap LiveOutCache;
// Dump the live-out cache to dbgs().
void dumpCache();
@ -223,32 +223,32 @@ public:
LiveIntervalMap(LiveIntervals &lis,
MachineDominatorTree &mdt,
const LiveInterval &parentli)
: lis_(lis), mdt_(mdt), parentli_(parentli), li_(0) {}
: LIS(lis), MDT(mdt), ParentLI(parentli), LI(0) {}
/// reset - clear all data structures and start a new live interval.
void reset(LiveInterval *);
/// getLI - return the current live interval.
LiveInterval *getLI() const { return li_; }
LiveInterval *getLI() const { return LI; }
/// defValue - define a value in li_ from the parentli_ value VNI and Idx.
/// defValue - define a value in LI from the ParentLI value VNI and Idx.
/// Idx does not have to be ParentVNI->def, but it must be contained within
/// ParentVNI's live range in parentli_.
/// Return the new li_ value.
/// ParentVNI's live range in ParentLI.
/// Return the new LI value.
VNInfo *defValue(const VNInfo *ParentVNI, SlotIndex Idx);
/// mapValue - map ParentVNI to the corresponding li_ value at Idx. It is
/// mapValue - map ParentVNI to the corresponding LI value at Idx. It is
/// assumed that ParentVNI is live at Idx.
/// If ParentVNI has not been defined by defValue, it is assumed that
/// ParentVNI->def dominates Idx.
/// If ParentVNI has been defined by defValue one or more times, a value that
/// dominates Idx will be returned. This may require creating extra phi-def
/// values and adding live ranges to li_.
/// values and adding live ranges to LI.
/// If simple is not NULL, *simple will indicate if ParentVNI is a simply
/// mapped value.
VNInfo *mapValue(const VNInfo *ParentVNI, SlotIndex Idx, bool *simple = 0);
// extendTo - Find the last li_ value defined in MBB at or before Idx. The
// extendTo - Find the last LI value defined in MBB at or before Idx. The
// parentli is assumed to be live at Idx. Extend the live range to include
// Idx. Return the found VNInfo, or NULL.
VNInfo *extendTo(const MachineBasicBlock *MBB, SlotIndex Idx);
@ -256,18 +256,18 @@ public:
/// isMapped - Return true is ParentVNI is a known mapped value. It may be a
/// simple 1-1 mapping or a complex mapping to later defs.
bool isMapped(const VNInfo *ParentVNI) const {
return valueMap_.count(ParentVNI);
return Values.count(ParentVNI);
}
/// isComplexMapped - Return true if ParentVNI has received new definitions
/// with defValue.
bool isComplexMapped(const VNInfo *ParentVNI) const;
// addSimpleRange - Add a simple range from parentli_ to li_.
// addSimpleRange - Add a simple range from ParentLI to LI.
// ParentVNI must be live in the [Start;End) interval.
void addSimpleRange(SlotIndex Start, SlotIndex End, const VNInfo *ParentVNI);
/// addRange - Add live ranges to li_ where [Start;End) intersects parentli_.
/// addRange - Add live ranges to LI where [Start;End) intersects ParentLI.
/// All needed values whose def is not inside [Start;End) must be defined
/// beforehand so mapValue will work.
void addRange(SlotIndex Start, SlotIndex End);
@ -287,22 +287,22 @@ public:
///
class SplitEditor {
SplitAnalysis &sa_;
LiveIntervals &lis_;
VirtRegMap &vrm_;
MachineRegisterInfo &mri_;
const TargetInstrInfo &tii_;
const TargetRegisterInfo &tri_;
LiveIntervals &LIS;
VirtRegMap &VRM;
MachineRegisterInfo &MRI;
const TargetInstrInfo &TII;
const TargetRegisterInfo &TRI;
/// edit_ - The current parent register and new intervals created.
LiveRangeEdit &edit_;
/// Edit - The current parent register and new intervals created.
LiveRangeEdit &Edit;
/// dupli_ - Created as a copy of curli_, ranges are carved out as new
/// DupLI - Created as a copy of CurLI, ranges are carved out as new
/// intervals get added through openIntv / closeIntv. This is used to avoid
/// editing curli_.
LiveIntervalMap dupli_;
/// editing CurLI.
LiveIntervalMap DupLI;
/// Currently open LiveInterval.
LiveIntervalMap openli_;
LiveIntervalMap OpenLI;
/// defFromParent - Define Reg from ParentVNI at UseIdx using either
/// rematerialization or a COPY from parent. Return the new value.
@ -315,15 +315,15 @@ class SplitEditor {
/// intervalsLiveAt - Return true if any member of intervals_ is live at Idx.
bool intervalsLiveAt(SlotIndex Idx) const;
/// Values in curli whose live range has been truncated when entering an open
/// Values in CurLI whose live range has been truncated when entering an open
/// li.
SmallPtrSet<const VNInfo*, 8> truncatedValues;
/// addTruncSimpleRange - Add the given simple range to dupli_ after
/// addTruncSimpleRange - Add the given simple range to DupLI after
/// truncating any overlap with intervals_.
void addTruncSimpleRange(SlotIndex Start, SlotIndex End, VNInfo *VNI);
/// criticalPreds_ - Set of basic blocks where both dupli and openli should be
/// criticalPreds_ - Set of basic blocks where both dupli and OpenLI should be
/// live out because of a critical edge.
SplitAnalysis::BlockPtrSet criticalPreds_;
@ -346,20 +346,20 @@ public:
/// Create a new virtual register and live interval.
void openIntv();
/// enterIntvBefore - Enter openli before the instruction at Idx. If curli is
/// enterIntvBefore - Enter OpenLI before the instruction at Idx. If CurLI is
/// not live before Idx, a COPY is not inserted.
void enterIntvBefore(SlotIndex Idx);
/// enterIntvAtEnd - Enter openli at the end of MBB.
/// enterIntvAtEnd - Enter OpenLI at the end of MBB.
void enterIntvAtEnd(MachineBasicBlock &MBB);
/// useIntv - indicate that all instructions in MBB should use openli.
/// useIntv - indicate that all instructions in MBB should use OpenLI.
void useIntv(const MachineBasicBlock &MBB);
/// useIntv - indicate that all instructions in range should use openli.
/// useIntv - indicate that all instructions in range should use OpenLI.
void useIntv(SlotIndex Start, SlotIndex End);
/// leaveIntvAfter - Leave openli after the instruction at Idx.
/// leaveIntvAfter - Leave OpenLI after the instruction at Idx.
void leaveIntvAfter(SlotIndex Idx);
/// leaveIntvAtTop - Leave the interval at the top of MBB.
@ -376,15 +376,15 @@ public:
// ===--- High level methods ---===
/// splitAroundLoop - Split curli into a separate live interval inside
/// splitAroundLoop - Split CurLI into a separate live interval inside
/// the loop.
void splitAroundLoop(const MachineLoop*);
/// splitSingleBlocks - Split curli into a separate live interval inside each
/// splitSingleBlocks - Split CurLI into a separate live interval inside each
/// basic block in Blocks.
void splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks);
/// splitInsideBlock - Split curli into multiple intervals inside MBB.
/// splitInsideBlock - Split CurLI into multiple intervals inside MBB.
void splitInsideBlock(const MachineBasicBlock *);
};