From 078e239f6948d4a942e16db3868908e503a51efb Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 19 Nov 2010 23:14:43 +0000 Subject: [PATCH] Fix ARM LDR* post-indexed operand encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119869 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.td | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 636801b09a2..c1ac9c56c39 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1637,13 +1637,13 @@ multiclass AI3_ldridx op, bit op20, string opc, InstrItinClass itin> { (ins GPR:$Rn, am3offset:$offset), IndexModePost, LdMiscFrm, itin, opc, "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []> { - bits<10> addr; + bits<10> offset; bits<4> Rn; - let Inst{23} = addr{8}; // U bit - let Inst{22} = addr{9}; // 1 == imm8, 0 == Rm + let Inst{23} = offset{8}; // U bit + let Inst{22} = offset{9}; // 1 == imm8, 0 == Rm let Inst{19-16} = Rn; - let Inst{11-8} = addr{7-4}; // imm7_4/zero - let Inst{3-0} = addr{3-0}; // imm3_0/Rm + let Inst{11-8} = offset{7-4}; // imm7_4/zero + let Inst{3-0} = offset{3-0}; // imm3_0/Rm } }