From 0795830269bf325c2b422c89a4725bc6a64654ec Mon Sep 17 00:00:00 2001 From: Serge Pavlov Date: Mon, 12 May 2014 05:44:53 +0000 Subject: [PATCH] Fix reordering of shuffles and binary operations Do not apply transformation: BinOp(shuffle(v1), shuffle(v2)) -> shuffle(BinOp(v1, v2)) if operands v1 and v2 are of different size. This change fixes PR19717, which was caused by r208488. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208518 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/InstCombine/InstructionCombining.cpp | 1 + test/Transforms/InstCombine/vec_shuffle.ll | 12 ++++++++++++ 2 files changed, 13 insertions(+) diff --git a/lib/Transforms/InstCombine/InstructionCombining.cpp b/lib/Transforms/InstCombine/InstructionCombining.cpp index 82b7cae410c..90ca8863e8c 100644 --- a/lib/Transforms/InstCombine/InstructionCombining.cpp +++ b/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -1120,6 +1120,7 @@ Value *InstCombiner::SimplifyVectorOp(BinaryOperator &Inst) { ShuffleVectorInst *RShuf = cast(RHS); if (isa(LShuf->getOperand(1)) && isa(RShuf->getOperand(1)) && + LShuf->getOperand(0)->getType() == RShuf->getOperand(0)->getType() && LShuf->getMask() == RShuf->getMask()) { BinaryOperator *NewBO = CreateBinOpAsGiven(Inst, LShuf->getOperand(0), RShuf->getOperand(0), Builder); diff --git a/test/Transforms/InstCombine/vec_shuffle.ll b/test/Transforms/InstCombine/vec_shuffle.ll index d619ed0e13d..79377a18765 100644 --- a/test/Transforms/InstCombine/vec_shuffle.ll +++ b/test/Transforms/InstCombine/vec_shuffle.ll @@ -363,3 +363,15 @@ define <4 x i32> @shuffle_17mulsplat(<4 x i32> %v) { <4 x i32> ret <4 x i32> %s2 } + +; Do not reorder shuffle and binop if LHS of shuffles are of different size +define <2 x i32> @pr19717(<4 x i32> %in0, <2 x i32> %in1) { +; CHECK-LABEL: @pr19717( +; CHECK: shufflevector +; CHECK: shufflevector +; CHECK: mul + %shuffle = shufflevector <4 x i32> %in0, <4 x i32> %in0, <2 x i32> zeroinitializer + %shuffle4 = shufflevector <2 x i32> %in1, <2 x i32> %in1, <2 x i32> zeroinitializer + %mul = mul <2 x i32> %shuffle, %shuffle4 + ret <2 x i32> %mul +}