6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00
Code Issues Projects Releases Wiki Activity

Fix reordering of shuffles and binary operations

Browse Source 
Do not apply transformation:

    BinOp(shuffle(v1), shuffle(v2)) -> shuffle(BinOp(v1, v2))

if operands v1 and v2 are of different size.
This change fixes PR19717, which was caused by r208488.
    


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208518 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Serge Pavlov 2014-05-12 05:44:53 +00:00
parent 8b6f7428b0
commit 0795830269
2 changed files with 13 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/Transforms/InstCombine/InstructionCombining.cpp
View File

@ -1120,6 +1120,7 @@ Value *InstCombiner::SimplifyVectorOp(BinaryOperator &Inst) {
ShuffleVectorInst *RShuf = cast<ShuffleVectorInst>(RHS);
if (isa<UndefValue>(LShuf->getOperand(1)) &&
isa<UndefValue>(RShuf->getOperand(1)) &&
LShuf->getOperand(0)->getType() == RShuf->getOperand(0)->getType() &&
LShuf->getMask() == RShuf->getMask()) {
BinaryOperator *NewBO = CreateBinOpAsGiven(Inst, LShuf->getOperand(0),
RShuf->getOperand(0), Builder);

12
test/Transforms/InstCombine/vec_shuffle.ll
View File

@ -363,3 +363,15 @@ define <4 x i32> @shuffle_17mulsplat(<4 x i32> %v) {
<4 x i32> <i32 1, i32 1, i32 1, i32 1>
ret <4 x i32> %s2
}
; Do not reorder shuffle and binop if LHS of shuffles are of different size
define <2 x i32> @pr19717(<4 x i32> %in0, <2 x i32> %in1) {
; CHECK-LABEL: @pr19717(
; CHECK: shufflevector
; CHECK: shufflevector
; CHECK: mul
%shuffle = shufflevector <4 x i32> %in0, <4 x i32> %in0, <2 x i32> zeroinitializer
%shuffle4 = shufflevector <2 x i32> %in1, <2 x i32> %in1, <2 x i32> zeroinitializer
%mul = mul <2 x i32> %shuffle, %shuffle4
ret <2 x i32> %mul
}