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Add #pragma vectorize enable/disable to LLVM
The intended behaviour is to force vectorization on the presence of the flag (either turn on or off), and to continue the behaviour as expected in its absence. Tests were added to make sure the all cases are covered in opt. No tests were added in other tools with the assumption that they should use the PassManagerBuilder in the same way. This patch also removes the outdated -late-vectorize flag, which was on by default and not helping much. The pragma metadata is being attached to the same place as other loop metadata, but nothing forbids one from attaching it to a function (to enable #pragma optimize) or basic blocks (to hint the basic-block vectorizers), etc. The logic should be the same all around. Patches to Clang to produce the metadata will be produced after the initial implementation is agreed upon and committed. Patches to other vectorizers (such as SLP and BB) will be added once we're happy with the pass manager changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196537 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -111,7 +111,6 @@ public:
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bool BBVectorize;
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bool BBVectorize;
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bool SLPVectorize;
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bool SLPVectorize;
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bool LoopVectorize;
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bool LoopVectorize;
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bool LateVectorize;
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bool RerollLoops;
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bool RerollLoops;
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private:
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private:
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@ -114,7 +114,8 @@ createBBVectorizePass(const VectorizeConfig &C = VectorizeConfig());
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//
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//
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// LoopVectorize - Create a loop vectorization pass.
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// LoopVectorize - Create a loop vectorization pass.
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//
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//
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Pass *createLoopVectorizePass(bool NoUnrolling = false);
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Pass *createLoopVectorizePass(bool NoUnrolling = false,
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bool AlwaysVectorize = true);
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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//
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//
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@ -32,11 +32,6 @@ static cl::opt<bool>
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RunLoopVectorization("vectorize-loops", cl::Hidden,
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RunLoopVectorization("vectorize-loops", cl::Hidden,
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cl::desc("Run the Loop vectorization passes"));
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cl::desc("Run the Loop vectorization passes"));
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static cl::opt<bool>
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LateVectorization("late-vectorize", cl::init(true), cl::Hidden,
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cl::desc("Run the vectorization pasess late in the pass "
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"pipeline (after the inliner)"));
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static cl::opt<bool>
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static cl::opt<bool>
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RunSLPVectorization("vectorize-slp", cl::Hidden,
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RunSLPVectorization("vectorize-slp", cl::Hidden,
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cl::desc("Run the SLP vectorization passes"));
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cl::desc("Run the SLP vectorization passes"));
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@ -68,7 +63,6 @@ PassManagerBuilder::PassManagerBuilder() {
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BBVectorize = RunBBVectorization;
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BBVectorize = RunBBVectorization;
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SLPVectorize = RunSLPVectorization;
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SLPVectorize = RunSLPVectorization;
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LoopVectorize = RunLoopVectorization;
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LoopVectorize = RunLoopVectorization;
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LateVectorize = LateVectorization;
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RerollLoops = RunLoopRerolling;
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RerollLoops = RunLoopRerolling;
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}
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}
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@ -200,9 +194,6 @@ void PassManagerBuilder::populateModulePassManager(PassManagerBase &MPM) {
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MPM.add(createLoopIdiomPass()); // Recognize idioms like memset.
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MPM.add(createLoopIdiomPass()); // Recognize idioms like memset.
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MPM.add(createLoopDeletionPass()); // Delete dead loops
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MPM.add(createLoopDeletionPass()); // Delete dead loops
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if (!LateVectorize && LoopVectorize)
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MPM.add(createLoopVectorizePass(DisableUnrollLoops));
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if (!DisableUnrollLoops)
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if (!DisableUnrollLoops)
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MPM.add(createLoopUnrollPass()); // Unroll small loops
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MPM.add(createLoopUnrollPass()); // Unroll small loops
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addExtensionsToPM(EP_LoopOptimizerEnd, MPM);
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addExtensionsToPM(EP_LoopOptimizerEnd, MPM);
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@ -243,21 +234,18 @@ void PassManagerBuilder::populateModulePassManager(PassManagerBase &MPM) {
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MPM.add(createCFGSimplificationPass()); // Merge & remove BBs
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MPM.add(createCFGSimplificationPass()); // Merge & remove BBs
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MPM.add(createInstructionCombiningPass()); // Clean up after everything.
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MPM.add(createInstructionCombiningPass()); // Clean up after everything.
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// As an experimental mode, run any vectorization passes in a separate
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// FIXME: This is a HACK! The inliner pass above implicitly creates a CGSCC
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// pipeline from the CGSCC pass manager that runs iteratively with the
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// pass manager that we are specifically trying to avoid. To prevent this
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// inliner.
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// we must insert a no-op module pass to reset the pass manager.
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if (LateVectorize && LoopVectorize) {
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MPM.add(createBarrierNoopPass());
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// FIXME: This is a HACK! The inliner pass above implicitly creates a CGSCC
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MPM.add(createLoopVectorizePass(DisableUnrollLoops, LoopVectorize));
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// pass manager that we are specifically trying to avoid. To prevent this
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// FIXME: Because of #pragma vectorize enable, the passes below are always
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// we must insert a no-op module pass to reset the pass manager.
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// inserted in the pipeline, even when the vectorizer doesn't run (ex. when
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MPM.add(createBarrierNoopPass());
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// on -O1 and no #pragma is found). Would be good to have these two passes
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// as function calls, so that we can only pass them when the vectorizer
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// Add the various vectorization passes and relevant cleanup passes for
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// changed the code.
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// them since we are no longer in the middle of the main scalar pipeline.
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MPM.add(createInstructionCombiningPass());
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MPM.add(createLoopVectorizePass(DisableUnrollLoops));
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MPM.add(createCFGSimplificationPass());
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MPM.add(createInstructionCombiningPass());
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MPM.add(createCFGSimplificationPass());
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}
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if (!DisableUnitAtATime) {
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if (!DisableUnitAtATime) {
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// FIXME: We shouldn't bother with this anymore.
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// FIXME: We shouldn't bother with this anymore.
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@ -763,10 +763,13 @@ struct LoopVectorizeHints {
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unsigned Width;
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unsigned Width;
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/// Vectorization unroll factor.
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/// Vectorization unroll factor.
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unsigned Unroll;
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unsigned Unroll;
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/// Vectorization forced (-1 not selected, 0 force disabled, 1 force enabled)
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int Force;
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LoopVectorizeHints(const Loop *L, bool DisableUnrolling)
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LoopVectorizeHints(const Loop *L, bool DisableUnrolling)
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: Width(VectorizationFactor)
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: Width(VectorizationFactor)
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, Unroll(DisableUnrolling ? 1 : VectorizationUnroll)
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, Unroll(DisableUnrolling ? 1 : VectorizationUnroll)
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, Force(-1)
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, LoopID(L->getLoopID()) {
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, LoopID(L->getLoopID()) {
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getHints(L);
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getHints(L);
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// The command line options override any loop metadata except for when
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// The command line options override any loop metadata except for when
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@ -877,6 +880,11 @@ private:
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Unroll = Val;
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Unroll = Val;
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else
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else
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DEBUG(dbgs() << "LV: ignoring invalid unroll hint metadata\n");
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DEBUG(dbgs() << "LV: ignoring invalid unroll hint metadata\n");
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} else if (Hint == "enable") {
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if (C->getBitWidth() == 1)
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Force = Val;
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else
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DEBUG(dbgs() << "LV: ignoring invalid enable hint metadata\n");
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} else {
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} else {
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DEBUG(dbgs() << "LV: ignoring unknown hint " << Hint << '\n');
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DEBUG(dbgs() << "LV: ignoring unknown hint " << Hint << '\n');
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}
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}
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@ -888,8 +896,10 @@ struct LoopVectorize : public LoopPass {
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/// Pass identification, replacement for typeid
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/// Pass identification, replacement for typeid
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static char ID;
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static char ID;
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explicit LoopVectorize(bool NoUnrolling = false)
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explicit LoopVectorize(bool NoUnrolling = false, bool AlwaysVectorize = true)
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: LoopPass(ID), DisableUnrolling(NoUnrolling) {
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: LoopPass(ID),
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DisableUnrolling(NoUnrolling),
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AlwaysVectorize(AlwaysVectorize) {
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initializeLoopVectorizePass(*PassRegistry::getPassRegistry());
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initializeLoopVectorizePass(*PassRegistry::getPassRegistry());
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}
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}
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@ -900,6 +910,7 @@ struct LoopVectorize : public LoopPass {
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DominatorTree *DT;
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DominatorTree *DT;
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TargetLibraryInfo *TLI;
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TargetLibraryInfo *TLI;
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bool DisableUnrolling;
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bool DisableUnrolling;
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bool AlwaysVectorize;
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virtual bool runOnLoop(Loop *L, LPPassManager &LPM) {
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virtual bool runOnLoop(Loop *L, LPPassManager &LPM) {
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// We only vectorize innermost loops.
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// We only vectorize innermost loops.
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@ -919,7 +930,7 @@ struct LoopVectorize : public LoopPass {
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return false;
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return false;
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if (DL == NULL) {
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if (DL == NULL) {
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DEBUG(dbgs() << "LV: Not vectorizing because of missing data layout\n");
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DEBUG(dbgs() << "LV: Not vectorizing: Missing data layout\n");
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return false;
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return false;
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}
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}
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@ -928,15 +939,25 @@ struct LoopVectorize : public LoopPass {
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LoopVectorizeHints Hints(L, DisableUnrolling);
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LoopVectorizeHints Hints(L, DisableUnrolling);
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if (Hints.Force == 0) {
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DEBUG(dbgs() << "LV: Not vectorizing: #pragma vectorize disable.\n");
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return false;
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}
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if (!AlwaysVectorize && Hints.Force != 1) {
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DEBUG(dbgs() << "LV: Not vectorizing: No #pragma vectorize enable.\n");
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return false;
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}
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if (Hints.Width == 1 && Hints.Unroll == 1) {
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if (Hints.Width == 1 && Hints.Unroll == 1) {
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DEBUG(dbgs() << "LV: Not vectorizing.\n");
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DEBUG(dbgs() << "LV: Not vectorizing: Disabled/already vectorized.\n");
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return false;
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return false;
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}
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}
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// Check if it is legal to vectorize the loop.
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// Check if it is legal to vectorize the loop.
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LoopVectorizationLegality LVL(L, SE, DL, DT, TLI);
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LoopVectorizationLegality LVL(L, SE, DL, DT, TLI);
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if (!LVL.canVectorize()) {
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if (!LVL.canVectorize()) {
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DEBUG(dbgs() << "LV: Not vectorizing.\n");
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DEBUG(dbgs() << "LV: Not vectorizing: Cannot prove legality.\n");
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return false;
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return false;
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}
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}
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@ -949,7 +970,8 @@ struct LoopVectorize : public LoopPass {
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Attribute::AttrKind SzAttr = Attribute::OptimizeForSize;
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Attribute::AttrKind SzAttr = Attribute::OptimizeForSize;
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Attribute::AttrKind FlAttr = Attribute::NoImplicitFloat;
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Attribute::AttrKind FlAttr = Attribute::NoImplicitFloat;
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unsigned FnIndex = AttributeSet::FunctionIndex;
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unsigned FnIndex = AttributeSet::FunctionIndex;
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bool OptForSize = F->getAttributes().hasAttribute(FnIndex, SzAttr);
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bool OptForSize = Hints.Force != 1 &&
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F->getAttributes().hasAttribute(FnIndex, SzAttr);
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bool NoFloat = F->getAttributes().hasAttribute(FnIndex, FlAttr);
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bool NoFloat = F->getAttributes().hasAttribute(FnIndex, FlAttr);
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if (NoFloat) {
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if (NoFloat) {
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@ -973,6 +995,7 @@ struct LoopVectorize : public LoopPass {
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DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial.\n");
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DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial.\n");
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if (UF == 1)
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if (UF == 1)
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return false;
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return false;
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DEBUG(dbgs() << "LV: Trying to at least unroll the loops.\n");
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// We decided not to vectorize, but we may want to unroll.
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// We decided not to vectorize, but we may want to unroll.
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InnerLoopUnroller Unroller(L, SE, LI, DT, DL, TLI, UF);
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InnerLoopUnroller Unroller(L, SE, LI, DT, DL, TLI, UF);
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Unroller.vectorize(&LVL);
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Unroller.vectorize(&LVL);
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@ -5016,8 +5039,8 @@ INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
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INITIALIZE_PASS_END(LoopVectorize, LV_NAME, lv_name, false, false)
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INITIALIZE_PASS_END(LoopVectorize, LV_NAME, lv_name, false, false)
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namespace llvm {
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namespace llvm {
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Pass *createLoopVectorizePass(bool NoUnrolling) {
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Pass *createLoopVectorizePass(bool NoUnrolling, bool AlwaysVectorize) {
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return new LoopVectorize(NoUnrolling);
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return new LoopVectorize(NoUnrolling, AlwaysVectorize);
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}
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}
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}
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}
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175
test/Transforms/LoopVectorize/metadata-enable.ll
Normal file
175
test/Transforms/LoopVectorize/metadata-enable.ll
Normal file
@ -0,0 +1,175 @@
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; RUN: opt < %s -O1 -S | FileCheck %s --check-prefix=O1
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; RUN: opt < %s -O2 -S | FileCheck %s --check-prefix=O2
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; RUN: opt < %s -O3 -S | FileCheck %s --check-prefix=O3
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; RUN: opt < %s -Os -S | FileCheck %s --check-prefix=Os
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; RUN: opt < %s -Oz -S | FileCheck %s --check-prefix=Oz
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; RUN: opt < %s -O1 -vectorize-loops -S | FileCheck %s --check-prefix=O1VEC
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; RUN: opt < %s -Oz -vectorize-loops -S | FileCheck %s --check-prefix=OzVEC
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; RUN: opt < %s -O1 -loop-vectorize -S | FileCheck %s --check-prefix=O1VEC2
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; RUN: opt < %s -Oz -loop-vectorize -S | FileCheck %s --check-prefix=OzVEC2
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; RUN: opt < %s -O3 -disable-loop-vectorization -S | FileCheck %s --check-prefix=O3DIS
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; This file tests the llvm.vectorizer.pragma forcing vectorization even when
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; optimization levels are too low, or when vectorization is disabled.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; O1-LABEL: @enabled(
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; O1: store <4 x i32>
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; O1: ret i32
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; O2-LABEL: @enabled(
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; O2: store <4 x i32>
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; O2: ret i32
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; O3-LABEL: @enabled(
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; O3: store <4 x i32>
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; O3: ret i32
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; Pragma always wins!
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; O3DIS-LABEL: @enabled(
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; O3DIS: store <4 x i32>
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; O3DIS: ret i32
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; Os-LABEL: @enabled(
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; Os: store <4 x i32>
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; Os: ret i32
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; Oz-LABEL: @enabled(
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; Oz: store <4 x i32>
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; Oz: ret i32
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; O1VEC-LABEL: @enabled(
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; O1VEC: store <4 x i32>
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; O1VEC: ret i32
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; OzVEC-LABEL: @enabled(
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; OzVEC: store <4 x i32>
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; OzVEC: ret i32
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; O1VEC2-LABEL: @enabled(
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; O1VEC2: store <4 x i32>
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; O1VEC2: ret i32
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; OzVEC2-LABEL: @enabled(
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; OzVEC2: store <4 x i32>
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; OzVEC2: ret i32
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define i32 @enabled(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %N) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv
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%0 = load i32* %arrayidx, align 4
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%add = add nsw i32 %0, %N
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%arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv
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store i32 %add, i32* %arrayidx2, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 32
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
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for.end: ; preds = %for.body
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%1 = load i32* %a, align 4
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ret i32 %1
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}
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; O1-LABEL: @nopragma(
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; O1-NOT: store <4 x i32>
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; O1: ret i32
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; O2-LABEL: @nopragma(
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; O2: store <4 x i32>
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; O2: ret i32
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; O3-LABEL: @nopragma(
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; O3: store <4 x i32>
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; O3: ret i32
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; O3DIS-LABEL: @nopragma(
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; O3DIS-NOT: store <4 x i32>
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; O3DIS: ret i32
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; Os-LABEL: @nopragma(
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; Os: store <4 x i32>
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; Os: ret i32
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; Oz-LABEL: @nopragma(
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; Oz-NOT: store <4 x i32>
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; Oz: ret i32
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; O1VEC-LABEL: @nopragma(
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; O1VEC: store <4 x i32>
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; O1VEC: ret i32
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; OzVEC-LABEL: @nopragma(
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; OzVEC: store <4 x i32>
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; OzVEC: ret i32
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; O1VEC2-LABEL: @nopragma(
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; O1VEC2: store <4 x i32>
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; O1VEC2: ret i32
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; OzVEC2-LABEL: @nopragma(
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; OzVEC2: store <4 x i32>
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; OzVEC2: ret i32
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||||||
|
define i32 @nopragma(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %N) {
|
||||||
|
entry:
|
||||||
|
br label %for.body
|
||||||
|
|
||||||
|
for.body: ; preds = %for.body, %entry
|
||||||
|
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||||
|
%arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv
|
||||||
|
%0 = load i32* %arrayidx, align 4
|
||||||
|
%add = add nsw i32 %0, %N
|
||||||
|
%arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv
|
||||||
|
store i32 %add, i32* %arrayidx2, align 4
|
||||||
|
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||||
|
%exitcond = icmp eq i64 %indvars.iv.next, 32
|
||||||
|
br i1 %exitcond, label %for.end, label %for.body
|
||||||
|
|
||||||
|
for.end: ; preds = %for.body
|
||||||
|
%1 = load i32* %a, align 4
|
||||||
|
ret i32 %1
|
||||||
|
}
|
||||||
|
|
||||||
|
; O1-LABEL: @disabled(
|
||||||
|
; O1-NOT: store <4 x i32>
|
||||||
|
; O1: ret i32
|
||||||
|
; O2-LABEL: @disabled(
|
||||||
|
; O2-NOT: store <4 x i32>
|
||||||
|
; O2: ret i32
|
||||||
|
; O3-LABEL: @disabled(
|
||||||
|
; O3-NOT: store <4 x i32>
|
||||||
|
; O3: ret i32
|
||||||
|
; O3DIS-LABEL: @disabled(
|
||||||
|
; O3DIS-NOT: store <4 x i32>
|
||||||
|
; O3DIS: ret i32
|
||||||
|
; Os-LABEL: @disabled(
|
||||||
|
; Os-NOT: store <4 x i32>
|
||||||
|
; Os: ret i32
|
||||||
|
; Oz-LABEL: @disabled(
|
||||||
|
; Oz-NOT: store <4 x i32>
|
||||||
|
; Oz: ret i32
|
||||||
|
; O1VEC-LABEL: @disabled(
|
||||||
|
; O1VEC-NOT: store <4 x i32>
|
||||||
|
; O1VEC: ret i32
|
||||||
|
; OzVEC-LABEL: @disabled(
|
||||||
|
; OzVEC-NOT: store <4 x i32>
|
||||||
|
; OzVEC: ret i32
|
||||||
|
; O1VEC2-LABEL: @disabled(
|
||||||
|
; O1VEC2-NOT: store <4 x i32>
|
||||||
|
; O1VEC2: ret i32
|
||||||
|
; OzVEC2-LABEL: @disabled(
|
||||||
|
; OzVEC2-NOT: store <4 x i32>
|
||||||
|
; OzVEC2: ret i32
|
||||||
|
|
||||||
|
define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %N) {
|
||||||
|
entry:
|
||||||
|
br label %for.body
|
||||||
|
|
||||||
|
for.body: ; preds = %for.body, %entry
|
||||||
|
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
|
||||||
|
%arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv
|
||||||
|
%0 = load i32* %arrayidx, align 4
|
||||||
|
%add = add nsw i32 %0, %N
|
||||||
|
%arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv
|
||||||
|
store i32 %add, i32* %arrayidx2, align 4
|
||||||
|
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||||
|
%exitcond = icmp eq i64 %indvars.iv.next, 32
|
||||||
|
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !2
|
||||||
|
|
||||||
|
for.end: ; preds = %for.body
|
||||||
|
%1 = load i32* %a, align 4
|
||||||
|
ret i32 %1
|
||||||
|
}
|
||||||
|
|
||||||
|
!0 = metadata !{metadata !0, metadata !1}
|
||||||
|
!1 = metadata !{metadata !"llvm.vectorizer.enable", i1 1}
|
||||||
|
!2 = metadata !{metadata !2, metadata !3}
|
||||||
|
!3 = metadata !{metadata !"llvm.vectorizer.enable", i1 0}
|
@ -471,8 +471,14 @@ static void AddOptimizationPasses(PassManagerBase &MPM,FunctionPassManager &FPM,
|
|||||||
Builder.DisableUnrollLoops = (DisableLoopUnrolling.getNumOccurrences() > 0) ?
|
Builder.DisableUnrollLoops = (DisableLoopUnrolling.getNumOccurrences() > 0) ?
|
||||||
DisableLoopUnrolling : OptLevel == 0;
|
DisableLoopUnrolling : OptLevel == 0;
|
||||||
|
|
||||||
Builder.LoopVectorize =
|
// This is final, unless there is a #pragma vectorize enable
|
||||||
DisableLoopVectorization ? false : OptLevel > 1 && SizeLevel < 2;
|
if (DisableLoopVectorization)
|
||||||
|
Builder.LoopVectorize = false;
|
||||||
|
// If option wasn't forced via cmd line (-vectorize-loops, -loop-vectorize)
|
||||||
|
else if (!Builder.LoopVectorize)
|
||||||
|
Builder.LoopVectorize = OptLevel > 1 && SizeLevel < 2;
|
||||||
|
|
||||||
|
// When #pragma vectorize is on for SLP, do the same as above
|
||||||
Builder.SLPVectorize =
|
Builder.SLPVectorize =
|
||||||
DisableSLPVectorization ? false : OptLevel > 1 && SizeLevel < 2;
|
DisableSLPVectorization ? false : OptLevel > 1 && SizeLevel < 2;
|
||||||
|
|
||||||
|
Loading…
x
Reference in New Issue
Block a user