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Thumb2 assembly parsing and encoding for LDRSB.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139389 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-09-09 19:42:40 +00:00
parent 95d397c3b1
commit 0811fe13d6
2 changed files with 66 additions and 1 deletions
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12
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -3730,16 +3730,26 @@ def : InstAlias<"dmb", (t2DMB 0xf)>, Requires<[IsThumb2, HasDB]>;
def : InstAlias<"dsb", (t2DSB 0xf)>, Requires<[IsThumb2, HasDB]>;
def : InstAlias<"isb", (t2ISB 0xf)>, Requires<[IsThumb2, HasDB]>;
// Alias for LDR, LDRB, LDRH without the ".w" optional width specifier.
// Alias for LDR, LDRB, LDRH, LDRSB, and LDRSH without the ".w" optional
// width specifier.
def : t2InstAlias<"ldr${p} $Rt, $addr",
(t2LDRi12 GPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
def : t2InstAlias<"ldrb${p} $Rt, $addr",
(t2LDRBi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
def : t2InstAlias<"ldrh${p} $Rt, $addr",
(t2LDRHi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
def : t2InstAlias<"ldrsb${p} $Rt, $addr",
(t2LDRSBi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
def : t2InstAlias<"ldrsh${p} $Rt, $addr",
(t2LDRSHi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
def : t2InstAlias<"ldr${p} $Rt, $addr",
(t2LDRs GPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
def : t2InstAlias<"ldrb${p} $Rt, $addr",
(t2LDRBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
def : t2InstAlias<"ldrh${p} $Rt, $addr",
(t2LDRHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
def : t2InstAlias<"ldrsb${p} $Rt, $addr",
(t2LDRSBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
def : t2InstAlias<"ldrsh${p} $Rt, $addr",
(t2LDRSHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;

55
test/MC/ARM/basic-thumb2-instructions.s
View File

@ -725,6 +725,61 @@ _func:
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
@------------------------------------------------------------------------------
@ LDRSB(immediate)
@------------------------------------------------------------------------------
ldrsb r5, [r5, #-4]
ldrsb r5, [r6, #32]
ldrsb r5, [r6, #33]
ldrsb r5, [r6, #257]
ldrsb.w lr, [r7, #257]
@ CHECK: ldrsb r5, [r5, #-4] @ encoding: [0x15,0xf9,0x04,0x5c]
@ CHECK: ldrsb.w r5, [r6, #32] @ encoding: [0x96,0xf9,0x20,0x50]
@ CHECK: ldrsb.w r5, [r6, #33] @ encoding: [0x96,0xf9,0x21,0x50]
@ CHECK: ldrsb.w r5, [r6, #257] @ encoding: [0x96,0xf9,0x01,0x51]
@ CHECK: ldrsb.w lr, [r7, #257] @ encoding: [0x97,0xf9,0x01,0xe1]
@------------------------------------------------------------------------------
@ LDRSB(register)
@------------------------------------------------------------------------------
ldrsb r1, [r8, r1]
ldrsb.w r4, [r5, r2]
ldrsb r6, [r0, r2, lsl #3]
ldrsb r8, [r8, r2, lsl #2]
ldrsb r7, [sp, r2, lsl #1]
ldrsb r7, [sp, r2, lsl #0]
ldrsb r5, [r8, #255]!
ldrsb r2, [r5, #4]!
ldrsb r1, [r4, #-4]!
ldrsb lr, [r3], #255
ldrsb r9, [r2], #4
ldrsb r3, [sp], #-4
@ CHECK: ldrsb.w r1, [r8, r1] @ encoding: [0x18,0xf9,0x01,0x10]
@ CHECK: ldrsb.w r4, [r5, r2] @ encoding: [0x15,0xf9,0x02,0x40]
@ CHECK: ldrsb.w r6, [r0, r2, lsl #3] @ encoding: [0x10,0xf9,0x32,0x60]
@ CHECK: ldrsb.w r8, [r8, r2, lsl #2] @ encoding: [0x18,0xf9,0x22,0x80]
@ CHECK: ldrsb.w r7, [sp, r2, lsl #1] @ encoding: [0x1d,0xf9,0x12,0x70]
@ CHECK: ldrsb.w r7, [sp, r2] @ encoding: [0x1d,0xf9,0x02,0x70]
@ CHECK: ldrsb r5, [r8, #255]! @ encoding: [0x18,0xf9,0xff,0x5f]
@ CHECK: ldrsb r2, [r5, #4]! @ encoding: [0x15,0xf9,0x04,0x2f]
@ CHECK: ldrsb r1, [r4, #-4]! @ encoding: [0x14,0xf9,0x04,0x1d]
@ CHECK: ldrsb lr, [r3], #255 @ encoding: [0x13,0xf9,0xff,0xeb]
@ CHECK: ldrsb r9, [r2], #4 @ encoding: [0x12,0xf9,0x04,0x9b]
@ CHECK: ldrsb r3, [sp], #-4 @ encoding: [0x1d,0xf9,0x04,0x39]
@------------------------------------------------------------------------------
@ LDRSB(literal)
@------------------------------------------------------------------------------
ldrsb r5, _bar
@ CHECK: ldrsb.w r5, _bar @ encoding: [0x9f'A',0xf9'A',A,0x50'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
@------------------------------------------------------------------------------
@ IT
@------------------------------------------------------------------------------