[AggressiveAntiDepBreaker] Use range loops for multimap access.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242620 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2015-07-18 20:05:10 +00:00
parent 3171fba5b2
commit 0836620230

View File

@ -509,15 +509,8 @@ BitVector AggressiveAntiDepBreaker::GetRenameRegisters(unsigned Reg) {
// Check all references that need rewriting for Reg. For each, use
// the corresponding register class to narrow the set of registers
// that are appropriate for renaming.
std::pair<std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference>::iterator,
std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference>::iterator>
Range = State->GetRegRefs().equal_range(Reg);
for (std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference>::iterator Q = Range.first,
QE = Range.second; Q != QE; ++Q) {
const TargetRegisterClass *RC = Q->second.RC;
for (const auto &Q : make_range(State->GetRegRefs().equal_range(Reg))) {
const TargetRegisterClass *RC = Q.second.RC;
if (!RC) continue;
BitVector RCBV = TRI->getAllocatableSet(MF, RC);
@ -685,9 +678,8 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
// We cannot rename 'Reg' to 'NewReg' if one of the uses of 'Reg' also
// defines 'NewReg' via an early-clobber operand.
auto Range = RegRefs.equal_range(Reg);
for (auto Q = Range.first, QE = Range.second; Q != QE; ++Q) {
auto UseMI = Q->second.Operand->getParent();
for (const auto &Q : make_range(RegRefs.equal_range(Reg))) {
MachineInstr *UseMI = Q.second.Operand->getParent();
int Idx = UseMI->findRegisterDefOperandIdx(NewReg, false, true, TRI);
if (Idx == -1)
continue;
@ -920,23 +912,16 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
// Update the references to the old register CurrReg to
// refer to the new register NewReg.
std::pair<std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference>::iterator,
std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference>::iterator>
Range = RegRefs.equal_range(CurrReg);
for (std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference>::iterator
Q = Range.first, QE = Range.second; Q != QE; ++Q) {
Q->second.Operand->setReg(NewReg);
for (const auto &Q : make_range(RegRefs.equal_range(CurrReg))) {
Q.second.Operand->setReg(NewReg);
// If the SU for the instruction being updated has debug
// information related to the anti-dependency register, make
// sure to update that as well.
const SUnit *SU = MISUnitMap[Q->second.Operand->getParent()];
const SUnit *SU = MISUnitMap[Q.second.Operand->getParent()];
if (!SU) continue;
for (DbgValueVector::iterator DVI = DbgValues.begin(),
DVE = DbgValues.end(); DVI != DVE; ++DVI)
if (DVI->second == Q->second.Operand->getParent())
if (DVI->second == Q.second.Operand->getParent())
UpdateDbgValue(DVI->first, AntiDepReg, NewReg);
}