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Fix misc warnings. Patch by Joe Abbey.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142332 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2011-10-18 03:17:34 +00:00
parent d8ffe5bb16
commit 0851a29b6d
3 changed files with 1 additions and 4 deletions
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1
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -2316,7 +2316,6 @@ SDNode *ARMDAGToDAGISel::SelectCMOVOp(SDNode *N) {
SDNode *ARMDAGToDAGISel::SelectABSOp(SDNode *N){
SDValue XORSrc0 = N->getOperand(0);
SDValue XORSrc1 = N->getOperand(1);
DebugLoc DL = N->getDebugLoc();
EVT VT = N->getValueType(0);
if (DisableARMIntABS)

2
lib/Target/ARM/ARMInstrThumb2.td
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@ -1345,6 +1345,7 @@ def t2STRB_PRE : T2Ipreldst<0, 0b00, 0, 1, (outs GPRnopc:$Rn_wb),
"$addr.base = $Rn_wb,@earlyclobber $Rn_wb", []> {
let AsmMatchConverter = "cvtStWriteBackRegT2AddrModeImm8";
}
} // mayStore = 1, neverHasSideEffects = 1
def t2STR_POST : T2Ipostldst<0, 0b10, 0, 0, (outs GPRnopc:$Rn_wb),
(ins rGPR:$Rt, addr_offset_none:$Rn,
@ -1399,7 +1400,6 @@ def t2STRH_preidx: t2PseudoInst<(outs GPRnopc:$Rn_wb),
[(set GPRnopc:$Rn_wb,
(pre_truncsti16 rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset))]>;
}
} // mayStore = 1, neverHasSideEffects = 1
// STRT, STRBT, STRHT all have offset mode (PUW=0b110) and are for disassembly
// only.

2
lib/Target/Mips/MipsISelLowering.cpp
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@ -788,8 +788,6 @@ static MachineBasicBlock* ExpandCondMov(MachineInstr *MI, MachineBasicBlock *BB,
MachineBasicBlock *
MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
MachineBasicBlock *BB) const {
DebugLoc dl = MI->getDebugLoc();
switch (MI->getOpcode()) {
default:
assert(false && "Unexpected instr type to insert");