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Fix misc warnings. Patch by Joe Abbey.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142332 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2316,7 +2316,6 @@ SDNode *ARMDAGToDAGISel::SelectCMOVOp(SDNode *N) {
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SDNode *ARMDAGToDAGISel::SelectABSOp(SDNode *N){
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SDValue XORSrc0 = N->getOperand(0);
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SDValue XORSrc1 = N->getOperand(1);
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DebugLoc DL = N->getDebugLoc();
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EVT VT = N->getValueType(0);
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if (DisableARMIntABS)
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@ -1345,6 +1345,7 @@ def t2STRB_PRE : T2Ipreldst<0, 0b00, 0, 1, (outs GPRnopc:$Rn_wb),
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"$addr.base = $Rn_wb,@earlyclobber $Rn_wb", []> {
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let AsmMatchConverter = "cvtStWriteBackRegT2AddrModeImm8";
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}
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} // mayStore = 1, neverHasSideEffects = 1
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def t2STR_POST : T2Ipostldst<0, 0b10, 0, 0, (outs GPRnopc:$Rn_wb),
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(ins rGPR:$Rt, addr_offset_none:$Rn,
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@ -1399,7 +1400,6 @@ def t2STRH_preidx: t2PseudoInst<(outs GPRnopc:$Rn_wb),
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[(set GPRnopc:$Rn_wb,
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(pre_truncsti16 rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset))]>;
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}
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} // mayStore = 1, neverHasSideEffects = 1
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// STRT, STRBT, STRHT all have offset mode (PUW=0b110) and are for disassembly
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// only.
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@ -788,8 +788,6 @@ static MachineBasicBlock* ExpandCondMov(MachineInstr *MI, MachineBasicBlock *BB,
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MachineBasicBlock *
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MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock *BB) const {
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DebugLoc dl = MI->getDebugLoc();
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switch (MI->getOpcode()) {
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default:
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assert(false && "Unexpected instr type to insert");
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