From 0877c6575addcce0807cf2181f92f83a19e30954 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sat, 15 Feb 2014 07:29:18 +0000 Subject: [PATCH] Add opcode extension forms of MOV8ri/MOV16ri/MOV32ri. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201463 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.td | 10 ++++++++++ test/MC/Disassembler/X86/x86-32.txt | 9 +++++++++ 2 files changed, 19 insertions(+) diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index ac7ff500d3c..34a592ffbbb 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -1212,6 +1212,16 @@ def MOV64ri : RIi64<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64imm:$src), "movabs{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, imm:$src)], IIC_MOV>; } + +// Longer forms that use a ModR/M byte. Needed for disassembler +let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in { +def MOV8ri_alt : Ii8 <0xC6, MRM0r, (outs GR8 :$dst), (ins i8imm :$src), + "mov{b}\t{$src, $dst|$dst, $src}", [], IIC_MOV>; +def MOV16ri_alt : Ii16<0xC7, MRM0r, (outs GR16:$dst), (ins i16imm:$src), + "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV>, OpSize16; +def MOV32ri_alt : Ii32<0xC7, MRM0r, (outs GR32:$dst), (ins i32imm:$src), + "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV>, OpSize32; +} } // SchedRW let SchedRW = [WriteStore] in { diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index e906c1ae793..a4a0b2cf9f0 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -699,3 +699,12 @@ # CHECK: movl %fs:0, %eax 0x64 0xa1 0x00 0x00 0x00 0x00 + +# CHECK: movb $-1, %al +0xc6 0xc0 0xff + +# CHECK: movw $65535, %ax +0x66 0xc7 0xc0 0xff 0xff + +# CHECK: movl $4294967295, %eax +0xc7 0xc0 0xff 0xff 0xff 0xff