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ARM-MachO: materialize callee address correctly on v4t.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214958 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-08-06 11:13:06 +00:00
parent c2482dfc39
commit 08828a979a
2 changed files with 25 additions and 1 deletions
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5
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -1666,7 +1666,10 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
if (isStub && Subtarget->isThumb1Only() && !Subtarget->hasV5TOps()) {
assert(Subtarget->isTargetMachO() && "WrapperPIC use on non-MachO?");
Callee = DAG.getNode(ARMISD::WrapperPIC, dl, getPointerTy(),
DAG.getTargetGlobalAddress(GV, dl, getPointerTy()));
DAG.getTargetGlobalAddress(GV, dl, getPointerTy(),
0, ARMII::MO_NONLAZY));
Callee = DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), Callee,
MachinePointerInfo::getGOT(), false, false, true, 0);
} else if (Subtarget->isTargetCOFF()) {
assert(Subtarget->isTargetWindows() &&
"Windows is the only supported COFF target");

21
test/CodeGen/ARM/none-macho-v4t.ll Normal file
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@ -0,0 +1,21 @@
; RUN: llc -mtriple=thumb-none-macho -mcpu=arm7tdmi %s -o - | FileCheck %s
; RUN: llc -mtriple=thumb-none-macho -mcpu=arm7tdmi %s -filetype=obj -o /dev/null
declare void @callee()
define void @test_call() {
; BX can only take a register before v5t came along, so we must materialise
; the address properly.
; CHECK-LABEL: test_call:
; CHECK: ldr r[[CALLEE_STUB:[0-9]+]], [[LITPOOL:LCPI[0-9]+_[0-9]+]]
; CHECK: [[PC_LABEL:LPC[0-9]+_[0-9]+]]:
; CHECK-NEXT: add r[[CALLEE_STUB]], pc
; CHECK: ldr [[CALLEE:r[0-9]+]], [r[[CALLEE_STUB]]]
; CHECK: mov lr, pc
; CHECK: bx [[CALLEE]]
; CHECK: [[LITPOOL]]:
; CHECK-NEXT: .long L_callee$non_lazy_ptr-([[PC_LABEL]]+4)
call void @callee()
ret void
}