6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-01 15:11:24 +00:00
Code Issues Projects Releases Wiki Activity

Move the Mips only bits of the ELF writer to lib/Target/Mips.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147133 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2011-12-22 03:03:17 +00:00
parent 6db2d92603
commit 090445967f
6 changed files with 146 additions and 145 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

102
lib/MC/ELFObjectWriter.cpp
View File

@ -27,8 +27,6 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/ADT/StringSwitch.h"
#include "../Target/Mips/MCTargetDesc/MipsFixupKinds.h"
#include <vector>
using namespace llvm;
@ -1262,9 +1260,8 @@ MCObjectWriter *llvm::createELFObjectWriter(MCELFObjectTargetWriter *MOTW,
case ELF::EM_PPC:
case ELF::EM_PPC64:
case ELF::EM_MBLAZE:
return new ELFObjectWriter(MOTW, OS, IsLittleEndian); break;
case ELF::EM_MIPS:
return new MipsELFObjectWriter(MOTW, OS, IsLittleEndian); break;
return new ELFObjectWriter(MOTW, OS, IsLittleEndian); break;
default: llvm_unreachable("Unsupported architecture"); break;
}
}
@ -1277,100 +1274,3 @@ unsigned ELFObjectWriter::GetRelocType(const MCValue &Target,
return TargetObjectWriter->GetRelocType(Target, Fixup, IsPCRel,
IsRelocWithSymbol, Addend);
}
/// START OF SUBCLASSES for ELFObjectWriter
//===- MipsELFObjectWriter -------------------------------------------===//
MipsELFObjectWriter::MipsELFObjectWriter(MCELFObjectTargetWriter *MOTW,
raw_ostream &_OS,
bool IsLittleEndian)
: ELFObjectWriter(MOTW, _OS, IsLittleEndian) {}
MipsELFObjectWriter::~MipsELFObjectWriter() {}
// FIXME: get the real EABI Version from the Triple.
unsigned MipsELFObjectWriter::getEFlags() const {
return ELF::EF_MIPS_NOREORDER | ELF::EF_MIPS_ARCH_32R2;
}
const MCSymbol *MipsELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,
const MCValue &Target,
const MCFragment &F,
const MCFixup &Fixup,
bool IsPCRel) const {
assert(Target.getSymA() && "SymA cannot be 0.");
const MCSymbol &Sym = Target.getSymA()->getSymbol();
if (Sym.getSection().getKind().isMergeableCString() ||
Sym.getSection().getKind().isMergeableConst())
return &Sym;
return NULL;
}
unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel,
bool IsRelocWithSymbol,
int64_t Addend) const {
// determine the type of the relocation
unsigned Type = (unsigned)ELF::R_MIPS_NONE;
unsigned Kind = (unsigned)Fixup.getKind();
switch (Kind) {
default:
llvm_unreachable("invalid fixup kind!");
case FK_Data_4:
Type = ELF::R_MIPS_32;
break;
case FK_GPRel_4:
Type = ELF::R_MIPS_GPREL32;
break;
case Mips::fixup_Mips_GPREL16:
Type = ELF::R_MIPS_GPREL16;
break;
case Mips::fixup_Mips_26:
Type = ELF::R_MIPS_26;
break;
case Mips::fixup_Mips_CALL16:
Type = ELF::R_MIPS_CALL16;
break;
case Mips::fixup_Mips_GOT_Global:
case Mips::fixup_Mips_GOT_Local:
Type = ELF::R_MIPS_GOT16;
break;
case Mips::fixup_Mips_HI16:
Type = ELF::R_MIPS_HI16;
break;
case Mips::fixup_Mips_LO16:
Type = ELF::R_MIPS_LO16;
break;
case Mips::fixup_Mips_TLSGD:
Type = ELF::R_MIPS_TLS_GD;
break;
case Mips::fixup_Mips_GOTTPREL:
Type = ELF::R_MIPS_TLS_GOTTPREL;
break;
case Mips::fixup_Mips_TPREL_HI:
Type = ELF::R_MIPS_TLS_TPREL_HI16;
break;
case Mips::fixup_Mips_TPREL_LO:
Type = ELF::R_MIPS_TLS_TPREL_LO16;
break;
case Mips::fixup_Mips_TLSLDM:
Type = ELF::R_MIPS_TLS_LDM;
break;
case Mips::fixup_Mips_DTPREL_HI:
Type = ELF::R_MIPS_TLS_DTPREL_HI16;
break;
case Mips::fixup_Mips_DTPREL_LO:
Type = ELF::R_MIPS_TLS_DTPREL_LO16;
break;
case Mips::fixup_Mips_Branch_PCRel:
case Mips::fixup_Mips_PC16:
Type = ELF::R_MIPS_PC16;
break;
}
return Type;
}

23
lib/MC/ELFObjectWriter.h
View File

@ -354,29 +354,6 @@ class ELFObjectWriter : public MCObjectWriter {
bool IsPCRel, bool IsRelocWithSymbol,
int64_t Addend) const;
};
//===- MipsELFObjectWriter -------------------------------------------===//
class MipsELFObjectWriter : public ELFObjectWriter {
public:
MipsELFObjectWriter(MCELFObjectTargetWriter *MOTW,
raw_ostream &_OS,
bool IsLittleEndian);
virtual ~MipsELFObjectWriter();
virtual unsigned getEFlags() const;
protected:
virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,
const MCValue &Target,
const MCFragment &F,
const MCFixup &Fixup,
bool IsPCRel) const;
virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
bool IsPCRel, bool IsRelocWithSymbol,
int64_t Addend) const;
};
}
#endif

1
lib/Target/Mips/MCTargetDesc/CMakeLists.txt
View File

@ -3,6 +3,7 @@ add_llvm_library(LLVMMipsDesc
MipsMCAsmInfo.cpp
MipsMCCodeEmitter.cpp
MipsMCTargetDesc.cpp
MipsELFObjectWriter.cpp
)
add_dependencies(LLVMMipsDesc MipsCommonTableGen)

23
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
View File

@ -69,15 +69,6 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
}
namespace {
class MipsELFObjectWriter : public MCELFObjectTargetWriter {
public:
MipsELFObjectWriter(bool is64Bit, uint8_t OSABI, uint16_t EMachine,
bool HasRelocationAddend)
: MCELFObjectTargetWriter(is64Bit, OSABI, EMachine,
HasRelocationAddend) {}
};
class MipsAsmBackend : public MCAsmBackend {
public:
MipsAsmBackend(const Target &T) : MCAsmBackend() {}
@ -206,12 +197,7 @@ public:
: MipsAsmBackend(T), OSABI(_OSABI) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createELFObjectWriter(createELFObjectTargetWriter(),
OS, /*IsLittleEndian*/ false);
}
MCELFObjectTargetWriter *createELFObjectTargetWriter() const {
return new MipsELFObjectWriter(false, OSABI, ELF::EM_MIPS, false);
return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ false, OSABI);
}
};
@ -223,12 +209,7 @@ public:
: MipsAsmBackend(T), OSABI(_OSABI) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createELFObjectWriter(createELFObjectTargetWriter(),
OS, /*IsLittleEndian*/ true);
}
MCELFObjectTargetWriter *createELFObjectTargetWriter() const {
return new MipsELFObjectWriter(false, OSABI, ELF::EM_MIPS, false);
return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ true, OSABI);
}
};
} // namespace

137
lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp Normal file
View File

@ -0,0 +1,137 @@
//===-- MipsELFObjectWriter.cpp - Mips ELF Writer ---------------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "MCTargetDesc/MipsFixupKinds.h"
#include "MCTargetDesc/MipsMCTargetDesc.h"
#include "llvm/MC/MCELFObjectWriter.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCValue.h"
#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
namespace {
class MipsELFObjectWriter : public MCELFObjectTargetWriter {
public:
MipsELFObjectWriter(uint8_t OSABI);
virtual ~MipsELFObjectWriter();
virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
bool IsPCRel, bool IsRelocWithSymbol,
int64_t Addend) const;
virtual unsigned getEFlags() const;
virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,
const MCValue &Target,
const MCFragment &F,
const MCFixup &Fixup,
bool IsPCRel) const;
};
}
MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI)
: MCELFObjectTargetWriter(/*Is64Bit*/ false, OSABI, ELF::EM_MIPS,
/*HasRelocationAddend*/ false) {}
MipsELFObjectWriter::~MipsELFObjectWriter() {}
// FIXME: get the real EABI Version from the Triple.
unsigned MipsELFObjectWriter::getEFlags() const {
return ELF::EF_MIPS_NOREORDER | ELF::EF_MIPS_ARCH_32R2;
}
const MCSymbol *MipsELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,
const MCValue &Target,
const MCFragment &F,
const MCFixup &Fixup,
bool IsPCRel) const {
assert(Target.getSymA() && "SymA cannot be 0.");
const MCSymbol &Sym = Target.getSymA()->getSymbol();
if (Sym.getSection().getKind().isMergeableCString() ||
Sym.getSection().getKind().isMergeableConst())
return &Sym;
return NULL;
}
unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel,
bool IsRelocWithSymbol,
int64_t Addend) const {
// determine the type of the relocation
unsigned Type = (unsigned)ELF::R_MIPS_NONE;
unsigned Kind = (unsigned)Fixup.getKind();
switch (Kind) {
default:
llvm_unreachable("invalid fixup kind!");
case FK_Data_4:
Type = ELF::R_MIPS_32;
break;
case FK_GPRel_4:
Type = ELF::R_MIPS_GPREL32;
break;
case Mips::fixup_Mips_GPREL16:
Type = ELF::R_MIPS_GPREL16;
break;
case Mips::fixup_Mips_26:
Type = ELF::R_MIPS_26;
break;
case Mips::fixup_Mips_CALL16:
Type = ELF::R_MIPS_CALL16;
break;
case Mips::fixup_Mips_GOT_Global:
case Mips::fixup_Mips_GOT_Local:
Type = ELF::R_MIPS_GOT16;
break;
case Mips::fixup_Mips_HI16:
Type = ELF::R_MIPS_HI16;
break;
case Mips::fixup_Mips_LO16:
Type = ELF::R_MIPS_LO16;
break;
case Mips::fixup_Mips_TLSGD:
Type = ELF::R_MIPS_TLS_GD;
break;
case Mips::fixup_Mips_GOTTPREL:
Type = ELF::R_MIPS_TLS_GOTTPREL;
break;
case Mips::fixup_Mips_TPREL_HI:
Type = ELF::R_MIPS_TLS_TPREL_HI16;
break;
case Mips::fixup_Mips_TPREL_LO:
Type = ELF::R_MIPS_TLS_TPREL_LO16;
break;
case Mips::fixup_Mips_TLSLDM:
Type = ELF::R_MIPS_TLS_LDM;
break;
case Mips::fixup_Mips_DTPREL_HI:
Type = ELF::R_MIPS_TLS_DTPREL_HI16;
break;
case Mips::fixup_Mips_DTPREL_LO:
Type = ELF::R_MIPS_TLS_DTPREL_LO16;
break;
case Mips::fixup_Mips_Branch_PCRel:
case Mips::fixup_Mips_PC16:
Type = ELF::R_MIPS_PC16;
break;
}
return Type;
}
MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS,
bool IsLittleEndian,
uint8_t OSABI) {
MCELFObjectTargetWriter *MOTW = new MipsELFObjectWriter(OSABI);
return createELFObjectWriter(MOTW, OS, IsLittleEndian);
}

5
lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
View File

@ -14,6 +14,8 @@
#ifndef MIPSMCTARGETDESC_H
#define MIPSMCTARGETDESC_H
#include "llvm/Support/DataTypes.h"
namespace llvm {
class MCAsmBackend;
class MCCodeEmitter;
@ -36,6 +38,9 @@ MCCodeEmitter *createMipsMCCodeEmitter(const MCInstrInfo &MCII,
MCAsmBackend *createMipsAsmBackend(const Target &T, StringRef TT);
MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
bool IsLittleEndian,
uint8_t OSABI);
} // End llvm namespace
// Defines symbolic names for Mips registers. This defines a mapping from