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try to do better match for i32 adds

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20143 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-02-12 21:11:17 +00:00
parent 9b1e659cd6
commit 093f32785b
1 changed files with 22 additions and 1 deletions
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23
lib/Target/Alpha/AlphaISelPattern.cpp
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@ -920,13 +920,34 @@ unsigned ISel::SelectExpr(SDOperand N) {
cast<ConstantSDNode>(N.getOperand(0).getOperand(1))->getValue() <= 255)
{ //Normal imm add/sub
Opc = isAdd ? Alpha::ADDLi : (isMul ? Alpha::MULLi : Alpha::SUBLi);
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
//if the value was really originally a i32, skip the up conversion
if (N.getOperand(0).getOperand(0).getOpcode() == ISD::SIGN_EXTEND_INREG &&
dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(0).Val)
->getExtraValueType() == MVT::i32)
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(0));
else
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
Tmp2 = cast<ConstantSDNode>(N.getOperand(0).getOperand(1))->getValue();
BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addImm(Tmp2);
}
else
{ //Normal add/sub
Opc = isAdd ? Alpha::ADDL : (isMul ? Alpha::MULLi : Alpha::SUBL);
//if the value was really originally a i32, skip the up conversion
if (N.getOperand(0).getOperand(0).getOpcode() == ISD::SIGN_EXTEND_INREG &&
dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(0).Val)
->getExtraValueType() == MVT::i32)
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(0));
else
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
//if the value was really originally a i32, skip the up conversion
if (N.getOperand(0).getOperand(1).getOpcode() == ISD::SIGN_EXTEND_INREG &&
dyn_cast<MVTSDNode>(N.getOperand(0).getOperand(1).Val)
->getExtraValueType() == MVT::i32)
Tmp2 = SelectExpr(N.getOperand(0).getOperand(1).getOperand(0));
else
Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);