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Fix X86FastISel's address folding to check displacement
values for overflow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56686 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -345,8 +345,12 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) {
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if (isCall) break;
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// Adds of constants are common and easy enough.
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if (ConstantInt *CI = dyn_cast<ConstantInt>(U->getOperand(1))) {
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AM.Disp += CI->getZExtValue();
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return X86SelectAddress(U->getOperand(0), AM, isCall);
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uint64_t Disp = (int32_t)AM.Disp + (uint64_t)CI->getSExtValue();
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// They have to fit in the 32-bit signed displacement field though.
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if (isInt32(Disp)) {
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AM.Disp = (uint32_t)Disp;
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return X86SelectAddress(U->getOperand(0), AM, isCall);
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}
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}
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break;
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}
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@ -354,7 +358,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) {
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case Instruction::GetElementPtr: {
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if (isCall) break;
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// Pattern-match simple GEPs.
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uint64_t Disp = AM.Disp;
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uint64_t Disp = (int32_t)AM.Disp;
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unsigned IndexReg = AM.IndexReg;
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unsigned Scale = AM.Scale;
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gep_type_iterator GTI = gep_type_begin(U);
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@ -371,7 +375,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) {
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uint64_t S = TD.getABITypeSize(GTI.getIndexedType());
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Op)) {
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// Constant-offset addressing.
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Disp += CI->getZExtValue() * S;
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Disp += CI->getSExtValue() * S;
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} else if (IndexReg == 0 &&
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(!AM.GV ||
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!getTargetMachine()->symbolicAddressesAreRIPRel()) &&
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@ -386,11 +390,14 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) {
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goto unsupported_gep;
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}
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}
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// Check for displacement overflow.
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if (!isInt32(Disp))
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break;
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// Ok, the GEP indices were covered by constant-offset and scaled-index
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// addressing. Update the address state and move on to examining the base.
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AM.IndexReg = IndexReg;
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AM.Scale = Scale;
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AM.Disp = Disp;
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AM.Disp = (uint32_t)Disp;
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return X86SelectAddress(U->getOperand(0), AM, isCall);
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unsupported_gep:
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// Ok, the GEP indices weren't all covered.
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