AArch64/ARM64: make NEON vector list parsing a bit more robust

It doesn't change the results, but it seems silly not to diagnose obvious
problems early on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208083 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-05-06 12:50:51 +00:00
parent d58350d789
commit 09b3bd8ca3
2 changed files with 6 additions and 3 deletions

View File

@ -3131,10 +3131,13 @@ bool ARM64AsmParser::parseVectorList(OperandVector &Operands) {
}
}
if (Parser.getTok().is(AsmToken::EndOfStatement))
Error(getLoc(), "'}' expected");
if (Parser.getTok().isNot(AsmToken::RCurly))
return Error(getLoc(), "'}' expected");
Parser.Lex(); // Eat the '}' token.
if (Count > 4)
return Error(S, "invalid number of vectors");
unsigned NumElements = 0;
char ElementKind = 0;
if (!Kind.empty())

View File

@ -14,7 +14,7 @@
ST4 {v0.8B-},[x0]
// CHECK-ERRORS: error: invalid number of vectors
// CHECK-ERRORS: error: unexpected token in argument list
// CHECK-ERRORS: error: '}' expected
// CHECK-ERRORS: error: mismatched register size suffix
// CHECK-ERRORS: error: mismatched register size suffix
// CHECK-ERRORS: error: vector register expected