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ARM "l" constraint for inline asm means R0-R7, also for Thumb2.

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This is consistent with llvm-gcc's arm/constraints.md.

Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2
mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93436 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-01-14 18:19:56 +00:00
parent dfe7281fab
commit 09bf003983
1 changed files with 2 additions and 2 deletions
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4
lib/Target/ARM/ARMISelLowering.cpp
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@ -4258,10 +4258,10 @@ std::pair<unsigned, const TargetRegisterClass*>
ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
EVT VT) const {
if (Constraint.size() == 1) {
// GCC RS6000 Constraint Letters
// GCC ARM Constraint Letters
switch (Constraint[0]) {
case 'l':
if (Subtarget->isThumb1Only())
if (Subtarget->isThumb())
return std::make_pair(0U, ARM::tGPRRegisterClass);
else
return std::make_pair(0U, ARM::GPRRegisterClass);