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Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -33,10 +33,8 @@ public:
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/// addReg - Add a new virtual register operand...
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///
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const MachineInstrBuilder &addReg(
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int RegNo,
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MachineOperand::UseType Ty = MachineOperand::Use) const {
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MI->addRegOperand(RegNo, Ty);
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const MachineInstrBuilder &addReg(int RegNo, bool isDef = false) const {
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MI->addRegOperand(RegNo, isDef);
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return *this;
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}
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@ -92,12 +90,10 @@ inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
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/// destination virtual register. NumOperands is the number of additional add*
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/// calls that are expected, not including the destination register.
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///
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inline MachineInstrBuilder BuildMI(
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int Opcode, unsigned NumOperands,
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unsigned DestReg,
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MachineOperand::UseType useType = MachineOperand::Def) {
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inline MachineInstrBuilder
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BuildMI(int Opcode, unsigned NumOperands, unsigned DestReg) {
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return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1))
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.addReg(DestReg, useType);
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.addReg(DestReg, true);
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}
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/// BuildMI - This version of the builder inserts the newly-built
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@ -112,7 +108,7 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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unsigned DestReg) {
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MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1);
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BB.insert(I, MI);
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return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
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return MachineInstrBuilder(MI).addReg(DestReg, true);
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}
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/// BuildMI - This version of the builder inserts the newly-built
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