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simplify SPULinuxTargetAsmInfo, remove use of TM.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77869 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-08-02 04:44:33 +00:00
parent 71a56d75b4
commit 09e820b07c
3 changed files with 16 additions and 44 deletions
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20
lib/Target/CellSPU/SPUTargetAsmInfo.cpp
View File

@ -12,16 +12,17 @@
//===----------------------------------------------------------------------===//
#include "SPUTargetAsmInfo.h"
#include "SPUTargetMachine.h"
#include "llvm/Function.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Dwarf.h"
using namespace llvm;
using namespace llvm::dwarf;
SPULinuxTargetAsmInfo::SPULinuxTargetAsmInfo(const SPUTargetMachine &TM) :
SPUTargetAsmInfo<TargetAsmInfo>(TM) {
SPULinuxTargetAsmInfo::SPULinuxTargetAsmInfo() {
ZeroDirective = "\t.space\t";
SetDirective = "\t.set";
Data64bitsDirective = "\t.quad\t";
AlignmentIsInBytes = false;
LCOMMDirective = "\t.lcomm\t";
InlineAsmStart = "# InlineAsm Start";
InlineAsmEnd = "# InlineAsm End";
PCSymbol = ".";
CommentString = "#";
GlobalPrefix = "";
@ -50,6 +51,3 @@ SPULinuxTargetAsmInfo::SPULinuxTargetAsmInfo(const SPUTargetMachine &TM) :
SupportsExceptionHandling = false;
}
// Instantiate default implementation.
TEMPLATE_INSTANTIATION(class SPUTargetAsmInfo<TargetAsmInfo>);

25
lib/Target/CellSPU/SPUTargetAsmInfo.h
View File

@ -15,32 +15,11 @@
#define SPUTARGETASMINFO_H
#include "llvm/Target/TargetAsmInfo.h"
#include "SPUTargetMachine.h"
#include "SPUSubtarget.h"
namespace llvm {
// Forward declaration.
class SPUTargetMachine;
template <class BaseTAI>
struct SPUTargetAsmInfo : public BaseTAI {
explicit SPUTargetAsmInfo(const SPUTargetMachine &TM) {
/* (unused today)
* const SPUSubtarget *Subtarget = &TM.getSubtarget<SPUSubtarget>(); */
BaseTAI::ZeroDirective = "\t.space\t";
BaseTAI::SetDirective = "\t.set";
BaseTAI::Data64bitsDirective = "\t.quad\t";
BaseTAI::AlignmentIsInBytes = false;
BaseTAI::LCOMMDirective = "\t.lcomm\t";
BaseTAI::InlineAsmStart = "# InlineAsm Start";
BaseTAI::InlineAsmEnd = "# InlineAsm End";
}
};
struct SPULinuxTargetAsmInfo : public SPUTargetAsmInfo<TargetAsmInfo> {
explicit SPULinuxTargetAsmInfo(const SPUTargetMachine &TM);
struct SPULinuxTargetAsmInfo : public TargetAsmInfo {
explicit SPULinuxTargetAsmInfo();
};
} // namespace llvm

15
lib/Target/CellSPU/SPUTargetMachine.cpp
View File

@ -34,10 +34,8 @@ SPUFrameInfo::getCalleeSaveSpillSlots(unsigned &NumEntries) const {
return &LR[0];
}
const TargetAsmInfo *
SPUTargetMachine::createTargetAsmInfo() const
{
return new SPULinuxTargetAsmInfo(*this);
const TargetAsmInfo *SPUTargetMachine::createTargetAsmInfo() const {
return new SPULinuxTargetAsmInfo();
}
SPUTargetMachine::SPUTargetMachine(const Target &T, const Module &M,
@ -48,8 +46,7 @@ SPUTargetMachine::SPUTargetMachine(const Target &T, const Module &M,
InstrInfo(*this),
FrameInfo(*this),
TLInfo(*this),
InstrItins(Subtarget.getInstrItineraryData())
{
InstrItins(Subtarget.getInstrItineraryData()) {
// For the time being, use static relocations, since there's really no
// support for PIC yet.
setRelocationModel(Reloc::Static);
@ -59,10 +56,8 @@ SPUTargetMachine::SPUTargetMachine(const Target &T, const Module &M,
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
bool
SPUTargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel)
{
bool SPUTargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
// Install an instruction selector.
PM.add(createSPUISelDag(*this));
return false;