diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index 1120df6e833..5328a49234e 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -16,6 +16,7 @@ #include "llvm/Target/TargetInstrItineraries.h" #include +#include namespace llvm { @@ -290,7 +291,8 @@ public: /// class LLVMTargetMachine : public TargetMachine { protected: // Can only create subclasses. - LLVMTargetMachine(const Target &T) : TargetMachine(T) { } + LLVMTargetMachine(const Target &T, const std::string &TargetTriple) + : TargetMachine(T) { } /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for /// both emitting to assembly files or machine code output. diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index fd6e765d938..c66570b2e3c 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -39,7 +39,7 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const std::string &TT, const std::string &FS, bool isThumb) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), Subtarget(TT, FS, isThumb), FrameInfo(Subtarget), JITInfo(), diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp index 5c61b6d7c55..bb140dca923 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -31,7 +31,7 @@ const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const { AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), DataLayout("e-f128:128:128"), FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0), JITInfo(*this), diff --git a/lib/Target/Blackfin/BlackfinTargetMachine.cpp b/lib/Target/Blackfin/BlackfinTargetMachine.cpp index 943ce17d4f7..35dba2568d8 100644 --- a/lib/Target/Blackfin/BlackfinTargetMachine.cpp +++ b/lib/Target/Blackfin/BlackfinTargetMachine.cpp @@ -29,7 +29,7 @@ const TargetAsmInfo* BlackfinTargetMachine::createTargetAsmInfo() const { BlackfinTargetMachine::BlackfinTargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), DataLayout("e-p:32:32-i64:32-f64:32"), Subtarget(TT, FS), TLInfo(*this), diff --git a/lib/Target/CellSPU/SPUTargetMachine.cpp b/lib/Target/CellSPU/SPUTargetMachine.cpp index 4b803a0fdc8..85dda310d28 100644 --- a/lib/Target/CellSPU/SPUTargetMachine.cpp +++ b/lib/Target/CellSPU/SPUTargetMachine.cpp @@ -39,7 +39,7 @@ const TargetAsmInfo *SPUTargetMachine::createTargetAsmInfo() const { SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), Subtarget(TT, FS), DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), diff --git a/lib/Target/MSP430/MSP430TargetMachine.cpp b/lib/Target/MSP430/MSP430TargetMachine.cpp index 2d6af85bbcb..f34e3db32b9 100644 --- a/lib/Target/MSP430/MSP430TargetMachine.cpp +++ b/lib/Target/MSP430/MSP430TargetMachine.cpp @@ -22,7 +22,7 @@ using namespace llvm; MSP430TargetMachine::MSP430TargetMachine(const Target &T, const std::string &TT, const std::string &FS) : - LLVMTargetMachine(T), + LLVMTargetMachine(T, TT), Subtarget(TT, FS), // FIXME: Check TargetData string. DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"), diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp index a3977560878..546c834c080 100644 --- a/lib/Target/Mips/MipsTargetMachine.cpp +++ b/lib/Target/Mips/MipsTargetMachine.cpp @@ -38,14 +38,13 @@ const TargetAsmInfo *MipsTargetMachine::createTargetAsmInfo() const { MipsTargetMachine:: MipsTargetMachine(const Target &T, const std::string &TT, const std::string &FS, bool isLittle=false): - LLVMTargetMachine(T), + LLVMTargetMachine(T, TT), Subtarget(TT, FS, isLittle), DataLayout(isLittle ? std::string("e-p:32:32:32-i8:8:32-i16:16:32") : std::string("E-p:32:32:32-i8:8:32-i16:16:32")), InstrInfo(*this), FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0), - TLInfo(*this) -{ + TLInfo(*this) { // Abicall enables PIC by default if (getRelocationModel() == Reloc::Default) { if (Subtarget.isABI_O32()) diff --git a/lib/Target/PIC16/PIC16TargetMachine.cpp b/lib/Target/PIC16/PIC16TargetMachine.cpp index f2d8aab9b99..d09097c17f3 100644 --- a/lib/Target/PIC16/PIC16TargetMachine.cpp +++ b/lib/Target/PIC16/PIC16TargetMachine.cpp @@ -23,7 +23,7 @@ using namespace llvm; // PIC16TargetMachine - Traditional PIC16 Machine. PIC16TargetMachine::PIC16TargetMachine(const Target &T, const std::string &TT, const std::string &FS, bool Cooper) -: LLVMTargetMachine(T), +: LLVMTargetMachine(T, TT), Subtarget(TT, FS, Cooper), DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"), InstrInfo(*this), TLInfo(*this), diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 251be7679b2..d08c81957b3 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -29,13 +29,12 @@ extern "C" void LLVMInitializePowerPCTarget() { const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const { if (Subtarget.isDarwin()) return new PPCDarwinTargetAsmInfo(*this); - else - return new PPCLinuxTargetAsmInfo(*this); + return new PPCLinuxTargetAsmInfo(*this); } -PPCTargetMachine::PPCTargetMachine(const Target&T, const std::string &TT, +PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT, const std::string &FS, bool is64Bit) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), Subtarget(TT, FS, is64Bit), DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this), diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp index f7c172216af..c9a3cdd6c7b 100644 --- a/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/lib/Target/Sparc/SparcTargetMachine.cpp @@ -31,7 +31,7 @@ const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const { /// SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), DataLayout("E-p:32:32-f128:128:128"), Subtarget(TT, FS), TLInfo(*this), InstrInfo(Subtarget), FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { diff --git a/lib/Target/SystemZ/SystemZTargetMachine.cpp b/lib/Target/SystemZ/SystemZTargetMachine.cpp index 51b31a96098..cfd1f39cd35 100644 --- a/lib/Target/SystemZ/SystemZTargetMachine.cpp +++ b/lib/Target/SystemZ/SystemZTargetMachine.cpp @@ -31,7 +31,7 @@ const TargetAsmInfo *SystemZTargetMachine::createTargetAsmInfo() const { SystemZTargetMachine::SystemZTargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), Subtarget(TT, FS), DataLayout("E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32" "-f64:64:64-f128:128:128-a0:16:16"), diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 5719a35318c..76d0165c86e 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -58,7 +58,7 @@ X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT, /// X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT, const std::string &FS, bool is64Bit) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), Subtarget(TT, FS, is64Bit), DataLayout(Subtarget.getDataLayout()), FrameInfo(TargetFrameInfo::StackGrowsDown, diff --git a/lib/Target/XCore/XCoreTargetMachine.cpp b/lib/Target/XCore/XCoreTargetMachine.cpp index 8847809408b..0a5daf8792e 100644 --- a/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/lib/Target/XCore/XCoreTargetMachine.cpp @@ -25,7 +25,7 @@ const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const { /// XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : LLVMTargetMachine(T), + : LLVMTargetMachine(T, TT), Subtarget(TT, FS), DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-" "i16:16:32-i32:32:32-i64:32:32"),