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Avoid using MRI::liveout_iterator for computing VRSAVEs.

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The liveout lists are about to be removed from MRI, this is the only
place they were used after register allocation.

Get the live out V registers directly from the return instructions
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174399 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2013-02-05 17:40:36 +00:00
parent cdb0a58f88
commit 0a9d1d31e9
1 changed files with 15 additions and 6 deletions
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21
lib/Target/PowerPC/PPCFrameLowering.cpp
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@ -119,12 +119,21 @@ static void HandleVRSaveUpdate(MachineInstr *MI, const TargetInstrInfo &TII) {
if (VRRegNo[RegNo] == I->first) // If this really is a vector reg.
UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
}
for (MachineRegisterInfo::liveout_iterator
I = MF->getRegInfo().liveout_begin(),
E = MF->getRegInfo().liveout_end(); I != E; ++I) {
unsigned RegNo = getPPCRegisterNumbering(*I);
if (VRRegNo[RegNo] == *I) // If this really is a vector reg.
UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
// Live out registers appear as use operands on return instructions.
for (MachineFunction::const_iterator BI = MF->begin(), BE = MF->end();
UsedRegMask != 0 && BI != BE; ++BI) {
const MachineBasicBlock &MBB = *BI;
if (MBB.empty() || !MBB.back().isReturn())
continue;
const MachineInstr &Ret = MBB.back();
for (unsigned I = 0, E = Ret.getNumOperands(); I != E; ++I) {
const MachineOperand &MO = Ret.getOperand(I);
if (!MO.isReg() || !PPC::VRRCRegClass.contains(MO.getReg()))
continue;
unsigned RegNo = getPPCRegisterNumbering(MO.getReg());
UsedRegMask &= ~(1 << (31-RegNo));
}
}
// If no registers are used, turn this into a copy.