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Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.

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x * 40
=>
shlq    $3, %rdi
leaq    (%rdi,%rdi,4), %rax

This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq    (%rdi,%rdi,2), %rax
leaq    (%rsi,%rax,8), %rax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67917 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2009-03-28 05:57:29 +00:00
parent e8b64106ec
commit 0b0cd9113a
4 changed files with 98 additions and 11 deletions
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test/CodeGen/X86/imul-lea-2.ll
+15
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@@ -0,0 +1,15 @@
; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 3
; RUN: llvm-as < %s | llc -march=x86-64 | grep shl | count 1
; RUN: llvm-as < %s | llc -march=x86-64 | not grep imul
define i64 @t1(i64 %a) nounwind readnone {
entry:
%0 = mul i64 %a, 81 ; <i64> [#uses=1]
ret i64 %0
}
define i64 @t2(i64 %a) nounwind readnone {
entry:
%0 = mul i64 %a, 40 ; <i64> [#uses=1]
ret i64 %0
}