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implement the other half of the select_cc -> fsel lowering, which handles
when the RHS of the comparison is 0.0. Turn this on by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23083 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -16,16 +16,10 @@
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Constants.h"
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#include "llvm/Function.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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namespace llvm {
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cl::opt<bool> FSELTMP("ppc-fsel-custom-legalizer", cl::Hidden,
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cl::desc("Use a custom expander for fsel on ppc"));
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}
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PPC32TargetLowering::PPC32TargetLowering(TargetMachine &TM)
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: TargetLowering(TM) {
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@ -73,11 +67,9 @@ PPC32TargetLowering::PPC32TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::SELECT, MVT::f32, Expand);
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setOperationAction(ISD::SELECT, MVT::f64, Expand);
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// PowerPC wants to turn select_cc of FP into fsel.
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if (FSELTMP) {
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setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
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setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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}
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// PowerPC wants to turn select_cc of FP into fsel when possible.
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setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
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setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
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// PowerPC does not have BRCOND* which requires SetCC
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setOperationAction(ISD::BRCOND, MVT::Other, Expand);
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@ -91,14 +83,23 @@ PPC32TargetLowering::PPC32TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
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setSetCCResultContents(ZeroOrOneSetCCResult);
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if (!FSELTMP) {
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addLegalFPImmediate(+0.0); // Necessary for FSEL
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addLegalFPImmediate(-0.0); //
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}
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computeRegisterProperties();
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}
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/// isFloatingPointZero - Return true if this is 0.0 or -0.0.
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static bool isFloatingPointZero(SDOperand Op) {
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if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op))
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return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0);
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else if (Op.getOpcode() == ISD::EXTLOAD || Op.getOpcode() == ISD::LOAD) {
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// Maybe this has already been legalized into the constant pool?
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if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
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if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->get()))
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return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0);
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}
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return false;
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}
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/// LowerOperation - Provide custom lowering hooks for some operations.
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///
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SDOperand PPC32TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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@ -114,6 +115,26 @@ SDOperand PPC32TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1);
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SDOperand TV = Op.getOperand(2), FV = Op.getOperand(3);
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// If the RHS of the comparison is a 0.0, we don't need to do the
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// subtraction at all.
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if (isFloatingPointZero(RHS))
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switch (CC) {
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default: assert(0 && "Invalid FSEL condition"); abort();
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case ISD::SETULT:
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case ISD::SETLT:
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std::swap(TV, FV); // fsel is natively setge, swap operands for setlt
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case ISD::SETUGE:
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case ISD::SETGE:
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return DAG.getTargetNode(PPC::FSEL, ResVT, LHS, TV, FV);
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case ISD::SETUGT:
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case ISD::SETGT:
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std::swap(TV, FV); // fsel is natively setge, swap operands for setlt
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case ISD::SETULE:
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case ISD::SETLE:
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return DAG.getTargetNode(PPC::FSEL, ResVT,
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DAG.getNode(ISD::FNEG, ResVT, LHS), TV, FV);
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}
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switch (CC) {
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default: assert(0 && "Invalid FSEL condition"); abort();
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case ISD::SETULT:
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