From 0b51e4a43839fcd9b5c4c0247f96ea79ad71a4bb Mon Sep 17 00:00:00 2001
From: Misha Brukman <brukman+llvm@gmail.com>
Date: Wed, 22 Oct 2003 05:50:40 +0000
Subject: [PATCH] Add comments to describe what these functions actually do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9370 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/SparcV9/SparcV9InstrSelectionSupport.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h b/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
index 7a3c081d159..d49863c1c84 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
+++ b/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
@@ -17,6 +17,7 @@
 #include "llvm/DerivedTypes.h"
 #include "SparcInternals.h"
 
+// Choose load instruction opcode based on type of value
 inline MachineOpCode
 ChooseLoadInstruction(const Type *DestTy)
 {
@@ -39,6 +40,7 @@ ChooseLoadInstruction(const Type *DestTy)
   return 0;
 }
 
+// Choose store instruction opcode based on type of value
 inline MachineOpCode
 ChooseStoreInstruction(const Type *DestTy)
 {
@@ -86,6 +88,11 @@ ChooseAddInstructionByType(const Type* resultType)
 }
 
 
+// Because the Sparc instruction selector likes to re-write operands to
+// instructions, making them change from a Value* (virtual register) to a
+// Constant* (making an immediate field), we need to change the opcode from a
+// register-based instruction to an immediate-based instruction, hence this
+// mapping.
 static unsigned
 convertOpcodeFromRegToImm(unsigned Opcode) {
   switch (Opcode) {