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Add an assertion.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34596 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2007-02-25 09:47:31 +00:00
parent 48ef398ebd
commit 0badfea274
1 changed files with 5 additions and 3 deletions
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8
lib/CodeGen/RegisterScavenging.cpp
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@@ -76,10 +76,12 @@ void RegScavenger::forward() {
const MachineOperand &MO = MI->getOperand(i); const MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg() || !MO.isDef()) if (!MO.isReg() || !MO.isDef())
continue; continue;
// Skip two-address destination operand.
if (TID->findTiedToSrcOperand(i) != -1)
continue;
unsigned Reg = MO.getReg(); unsigned Reg = MO.getReg();
// Skip two-address destination operand.
if (TID->findTiedToSrcOperand(i) != -1) {
assert(isUsed(Reg));
continue;
}
assert(isUnused(Reg) || isReserved(Reg)); assert(isUnused(Reg) || isReserved(Reg));
if (!MO.isDead()) if (!MO.isDead())
setUsed(Reg); setUsed(Reg);