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The tLDR instruction wasn't encoded properly:
<MCInst 2251 <MCOperand Reg:70> <MCOperand Reg:66> <MCOperand Imm:0> <MCOperand Reg:0> <MCOperand Imm:14> <MCOperand Reg:0>> Notice that the "reg" here is 0, which is an invalid register. Put a check in the code for this to prevent crashing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120766 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -642,8 +642,12 @@ static unsigned getAddrModeSOpValue(const MCInst &MI, unsigned OpIdx,
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const MCOperand &MO2 = MI.getOperand(OpIdx + 2);
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unsigned Rn = getARMRegisterNumbering(MO.getReg());
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unsigned Imm5 = (MO1.getImm() / Scale) & 0x1f;
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unsigned Rm = getARMRegisterNumbering(MO2.getReg());
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return (Rm << 3) | (Imm5 << 3) | Rn;
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if (MO2.getReg() != 0)
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// Is an immediate.
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Imm5 = getARMRegisterNumbering(MO2.getReg());
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return (Imm5 << 3) | Rn;
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}
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/// getAddrModeS4OpValue - Return encoding for t_addrmode_s4 operands.
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