diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index 56e125e0a95..1dac67119a5 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -384,8 +384,7 @@ namespace llvm { virtual unsigned getISAEncoding() { return 0; } /// EmitDwarfRegOp - Emit dwarf register operation. - virtual void EmitDwarfRegOp(const MachineLocation &MLoc, - unsigned ExtraExprSize = 0) const; + virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const; //===------------------------------------------------------------------===// // Dwarf Lowering Routines diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index f42e628899a..d830e9766b7 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -750,8 +750,7 @@ getDebugValueLocation(const MachineInstr *MI) const { } /// EmitDwarfRegOp - Emit dwarf register operation. -void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, - unsigned ExtraExprSize) const { +void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { const TargetRegisterInfo *RI = TM.getRegisterInfo(); unsigned Reg = RI->getDwarfRegNum(MLoc.getReg(), false); if (int Offset = MLoc.getOffset()) { @@ -759,7 +758,7 @@ void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, // use DW_OP_fbreg. unsigned OffsetSize = Offset ? MCAsmInfo::getSLEB128Size(Offset) : 1; OutStreamer.AddComment("Loc expr size"); - EmitInt16(1 + OffsetSize + ExtraExprSize); + EmitInt16(1 + OffsetSize); OutStreamer.AddComment( dwarf::OperationEncodingString(dwarf::DW_OP_fbreg)); EmitInt8(dwarf::DW_OP_fbreg); @@ -774,7 +773,7 @@ void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, EmitInt8(dwarf::DW_OP_reg0 + Reg); } else { OutStreamer.AddComment("Loc expr size"); - EmitInt16(1 + MCAsmInfo::getULEB128Size(Reg) + ExtraExprSize); + EmitInt16(1 + MCAsmInfo::getULEB128Size(Reg)); OutStreamer.AddComment( dwarf::OperationEncodingString(dwarf::DW_OP_regx)); EmitInt8(dwarf::DW_OP_regx); diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 10cccda5e8b..b8c117c2cbe 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -173,11 +173,10 @@ getDebugValueLocation(const MachineInstr *MI) const { } /// EmitDwarfRegOp - Emit dwarf register operation. -void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, - unsigned ExtraExprSize) const { +void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { const TargetRegisterInfo *RI = TM.getRegisterInfo(); if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) - AsmPrinter::EmitDwarfRegOp(MLoc, ExtraExprSize); + AsmPrinter::EmitDwarfRegOp(MLoc); else { unsigned Reg = MLoc.getReg(); if (Reg >= ARM::S0 && Reg <= ARM::S31) { @@ -192,7 +191,7 @@ void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, OutStreamer.AddComment("Loc expr size"); // DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB // 1 + ULEB(Rx) + 1 + 1 + 1 - EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx) + ExtraExprSize); + EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx)); OutStreamer.AddComment("DW_OP_regx for S register"); EmitInt8(dwarf::DW_OP_regx); @@ -224,8 +223,7 @@ void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8) + // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8); // 6 + ULEB(D1) + ULEB(D2) - EmitInt16(6 + MCAsmInfo::getULEB128Size(D1) - + MCAsmInfo::getULEB128Size(D2) + ExtraExprSize); + EmitInt16(6 + MCAsmInfo::getULEB128Size(D1) + MCAsmInfo::getULEB128Size(D2)); OutStreamer.AddComment("DW_OP_regx for Q register: D1"); EmitInt8(dwarf::DW_OP_regx); diff --git a/lib/Target/ARM/ARMAsmPrinter.h b/lib/Target/ARM/ARMAsmPrinter.h index e94901449a1..5f9169ef7f7 100644 --- a/lib/Target/ARM/ARMAsmPrinter.h +++ b/lib/Target/ARM/ARMAsmPrinter.h @@ -90,8 +90,7 @@ public: MachineLocation getDebugValueLocation(const MachineInstr *MI) const; /// EmitDwarfRegOp - Emit dwarf register operation. - virtual void EmitDwarfRegOp(const MachineLocation &MLoc, - unsigned ExtraExprSize = 0) const; + virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const; virtual unsigned getISAEncoding() { // ARM/Darwin adds ISA to the DWARF info for each function.