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PowerPC: Fix encoding of stfsu and stfdu instructions
When testing the asm parser, I noticed wrong encodings for the above instructions (wrong sub-opcodes). Note that apparently the compiler currently never generates pre-inc instructions for floating point types for some reason ... Tests will be added together with the asm parser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180607 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1165,10 +1165,10 @@ def STHU : DForm_1<45, (outs ptr_rc_nor0:$ea_res), (ins GPRC:$rS, memri:$dst),
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def STWU : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins GPRC:$rS, memri:$dst),
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"stwu $rS, $dst", LdStStoreUpd, []>,
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RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">;
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def STFSU : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins F4RC:$rS, memri:$dst),
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def STFSU : DForm_1<53, (outs ptr_rc_nor0:$ea_res), (ins F4RC:$rS, memri:$dst),
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"stfsu $rS, $dst", LdStSTFDU, []>,
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RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">;
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def STFDU : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins F8RC:$rS, memri:$dst),
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def STFDU : DForm_1<55, (outs ptr_rc_nor0:$ea_res), (ins F8RC:$rS, memri:$dst),
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"stfdu $rS, $dst", LdStSTFDU, []>,
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RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">;
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}
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