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Add Atom Silvermont (slm) tests

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- check that -mcpu=slm uses the call register indirect optimization
- check that -mcpu=slm runs the scheduler 
- check that -mcpu=slm supports the movbe instruction



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190814 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Preston Gurd 2013-09-16 22:22:07 +00:00
parent b06ea25b4c
commit 0c190ad93f
3 changed files with 23 additions and 0 deletions
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10
test/CodeGen/X86/atom-call-reg-indirect.ll
View File

@ -2,6 +2,8 @@
; RUN: llc < %s -mcpu=core2 -mtriple=i686-linux | FileCheck -check-prefix=ATOM-NOT32 %s
; RUN: llc < %s -mcpu=atom -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM64 %s
; RUN: llc < %s -mcpu=core2 -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM-NOT64 %s
; RUN: llc < %s -mcpu=slm -mtriple=i686-linux | FileCheck -check-prefix=SLM32 %s
; RUN: llc < %s -mcpu=slm -mtriple=x86_64-linux | FileCheck -check-prefix=SLM64 %s
; fn_ptr.ll
@ -20,6 +22,10 @@ entry:
;ATOM64: movq (%rcx), %rcx
;ATOM64: callq *%rcx
;ATOM-NOT64: callq *(%rcx)
;SLM32: movl (%ecx), %ecx
;SLM32: calll *%ecx
;SLM64: movq (%rcx), %rcx
;SLM64: callq *%rcx
tail call void %1(%class.A* %call)
ret i32 0
}
@ -40,6 +46,10 @@ entry:
;ATOM64: movq (%rax), %rax
;ATOM64: callq *%rax
;ATOM-NOT64: callq *(%rax)
;SLM32: movl (%eax), %eax
;SLM32: calll *%eax
;SLM64: movq (%rax), %rax
;SLM64: callq *%rax
tail call void %1(i32 2)
ret i32 0
}

4
test/CodeGen/X86/atom-sched.ll
View File

@ -1,4 +1,5 @@
; RUN: llc <%s -O2 -mcpu=atom -march=x86 -relocation-model=static | FileCheck -check-prefix=atom %s
; RUN: llc <%s -O2 -mcpu=slm -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s
; RUN: llc <%s -O2 -mcpu=core2 -march=x86 -relocation-model=static | FileCheck %s
;
@ -13,6 +14,9 @@ define void @func() nounwind uwtable {
; atom: imull
; atom-NOT: movl
; atom: imull
; slm: imull
; slm-NOT: movl
; slm: imull
; CHECK: imull
; CHECK: movl
; CHECK: imull

9
test/CodeGen/X86/movbe.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -mtriple=x86_64-linux -mcpu=atom < %s | FileCheck %s
; RUN: llc -mtriple=x86_64-linux -mcpu=slm < %s | FileCheck %s -check-prefix=SLM
declare i32 @llvm.bswap.i32(i32) nounwind readnone
declare i64 @llvm.bswap.i64(i64) nounwind readnone
@ -9,6 +10,8 @@ define void @test1(i32* nocapture %x, i32 %y) nounwind {
ret void
; CHECK-LABEL: test1:
; CHECK: movbel %esi, (%rdi)
; SLM-LABEL: test1:
; SLM: movbel %esi, (%rdi)
}
define i32 @test2(i32* %x) nounwind {
@ -17,6 +20,8 @@ define i32 @test2(i32* %x) nounwind {
ret i32 %bswap
; CHECK-LABEL: test2:
; CHECK: movbel (%rdi), %eax
; SLM-LABEL: test2:
; SLM: movbel (%rdi), %eax
}
define void @test3(i64* %x, i64 %y) nounwind {
@ -25,6 +30,8 @@ define void @test3(i64* %x, i64 %y) nounwind {
ret void
; CHECK-LABEL: test3:
; CHECK: movbeq %rsi, (%rdi)
; SLM-LABEL: test3:
; SLM: movbeq %rsi, (%rdi)
}
define i64 @test4(i64* %x) nounwind {
@ -33,4 +40,6 @@ define i64 @test4(i64* %x) nounwind {
ret i64 %bswap
; CHECK-LABEL: test4:
; CHECK: movbeq (%rdi), %rax
; SLM-LABEL: test4:
; SLM: movbeq (%rdi), %rax
}