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Add micro-optimization which allows us to fold imm into cmp. This allows us to save 1 word (sometimes) and reduce register pressure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93551 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -675,21 +675,53 @@ static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC,
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case ISD::SETULE:
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std::swap(LHS, RHS); // FALLTHROUGH
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case ISD::SETUGE:
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// Turn lhs u>= rhs with lhs constant into rhs u< lhs+1, this allows us to
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// fold constant into instruction.
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if (const ConstantSDNode * C = dyn_cast<ConstantSDNode>(LHS)) {
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LHS = RHS;
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RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0));
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TCC = MSP430CC::COND_LO;
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break;
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}
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TCC = MSP430CC::COND_HS; // aka COND_C
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break;
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case ISD::SETUGT:
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std::swap(LHS, RHS); // FALLTHROUGH
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case ISD::SETULT:
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// Turn lhs u< rhs with lhs constant into rhs u>= lhs+1, this allows us to
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// fold constant into instruction.
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if (const ConstantSDNode * C = dyn_cast<ConstantSDNode>(LHS)) {
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LHS = RHS;
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RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0));
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TCC = MSP430CC::COND_HS;
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break;
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}
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TCC = MSP430CC::COND_LO; // aka COND_NC
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break;
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case ISD::SETLE:
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std::swap(LHS, RHS); // FALLTHROUGH
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case ISD::SETGE:
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// Turn lhs >= rhs with lhs constant into rhs < lhs+1, this allows us to
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// fold constant into instruction.
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if (const ConstantSDNode * C = dyn_cast<ConstantSDNode>(LHS)) {
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LHS = RHS;
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RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0));
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TCC = MSP430CC::COND_L;
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break;
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}
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TCC = MSP430CC::COND_GE;
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break;
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case ISD::SETGT:
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std::swap(LHS, RHS); // FALLTHROUGH
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case ISD::SETLT:
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// Turn lhs < rhs with lhs constant into rhs >= lhs+1, this allows us to
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// fold constant into instruction.
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if (const ConstantSDNode * C = dyn_cast<ConstantSDNode>(LHS)) {
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LHS = RHS;
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RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0));
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TCC = MSP430CC::COND_GE;
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break;
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}
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TCC = MSP430CC::COND_L;
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break;
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}
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