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X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm, FS_MOV32rm as codegen only.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78733 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar 2009-08-11 22:24:40 +00:00
parent e2811a7480
commit 0c420fc20a
2 changed files with 4 additions and 4 deletions
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4
lib/Target/X86/X86Instr64bit.td
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@ -1372,12 +1372,12 @@ def TLS_addr64 : I<0, Pseudo, (outs), (ins lea64mem:$sym),
[(X86tlsaddr tls64addr:$sym)]>,
Requires<[In64BitMode]>;
let AddedComplexity = 5 in
let AddedComplexity = 5, isCodeGenOnly = 1 in
def MOV64GSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
"movq\t%gs:$src, $dst",
[(set GR64:$dst, (gsload addr:$src))]>, SegGS;
let AddedComplexity = 5 in
let AddedComplexity = 5, isCodeGenOnly = 1 in
def MOV64FSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
"movq\t%fs:$src, $dst",
[(set GR64:$dst, (fsload addr:$src))]>, SegFS;

4
lib/Target/X86/X86InstrInfo.td
View File

@ -3199,12 +3199,12 @@ def TLS_addr32 : I<0, Pseudo, (outs), (ins lea32mem:$sym),
[(X86tlsaddr tls32addr:$sym)]>,
Requires<[In32BitMode]>;
let AddedComplexity = 5 in
let AddedComplexity = 5, isCodeGenOnly = 1 in
def GS_MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
"movl\t%gs:$src, $dst",
[(set GR32:$dst, (gsload addr:$src))]>, SegGS;
let AddedComplexity = 5 in
let AddedComplexity = 5, isCodeGenOnly = 1 in
def FS_MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
"movl\t%fs:$src, $dst",
[(set GR32:$dst, (fsload addr:$src))]>, SegFS;