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X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm, FS_MOV32rm as codegen only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78733 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1372,12 +1372,12 @@ def TLS_addr64 : I<0, Pseudo, (outs), (ins lea64mem:$sym),
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[(X86tlsaddr tls64addr:$sym)]>,
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Requires<[In64BitMode]>;
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let AddedComplexity = 5 in
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let AddedComplexity = 5, isCodeGenOnly = 1 in
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def MOV64GSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
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"movq\t%gs:$src, $dst",
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[(set GR64:$dst, (gsload addr:$src))]>, SegGS;
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let AddedComplexity = 5 in
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let AddedComplexity = 5, isCodeGenOnly = 1 in
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def MOV64FSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
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"movq\t%fs:$src, $dst",
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[(set GR64:$dst, (fsload addr:$src))]>, SegFS;
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@ -3199,12 +3199,12 @@ def TLS_addr32 : I<0, Pseudo, (outs), (ins lea32mem:$sym),
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[(X86tlsaddr tls32addr:$sym)]>,
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Requires<[In32BitMode]>;
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let AddedComplexity = 5 in
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let AddedComplexity = 5, isCodeGenOnly = 1 in
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def GS_MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
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"movl\t%gs:$src, $dst",
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[(set GR32:$dst, (gsload addr:$src))]>, SegGS;
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let AddedComplexity = 5 in
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let AddedComplexity = 5, isCodeGenOnly = 1 in
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def FS_MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
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"movl\t%fs:$src, $dst",
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[(set GR32:$dst, (fsload addr:$src))]>, SegFS;
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