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Add new helpers for registering targets.

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- Less boilerplate == good.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77052 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar 2009-07-25 06:49:55 +00:00
parent 92ccf70ad4
commit 0c795d6187
40 changed files with 188 additions and 344 deletions
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55
include/llvm/Target/TargetMachineRegistry.h
View File

@ -1,55 +0,0 @@
//===-- Target/TargetMachineRegistry.h - Target Registration ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file exposes two classes: the TargetMachineRegistry class, which allows
// tools to inspect all of registered targets, and the RegisterTarget class,
// which TargetMachine implementations should use to register themselves with
// the system.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_TARGETMACHINEREGISTRY_H
#define LLVM_TARGET_TARGETMACHINEREGISTRY_H
#include "llvm/Module.h"
#include "llvm/Target/TargetRegistry.h"
namespace llvm {
class Module;
class Target;
class TargetMachine;
//===--------------------------------------------------------------------===//
/// RegisterTarget - This class is used to make targets automatically register
/// themselves with the tools they are linked with. Targets should define an
/// single global Target instance and register it using the TargetRegistry
/// interfaces. Targets must also include a static instance of this class.
///
/// The type 'TargetMachineImpl' should provide a constructor with two
/// parameters:
/// - const Module& M: the module that is being compiled:
/// - const std::string& FS: target-specific string describing target
/// flavour.
template<class TargetMachineImpl>
struct RegisterTarget {
RegisterTarget(Target &T, const char *Name, const char *ShortDesc) {
TargetRegistry::RegisterTargetMachine(T, &Allocator);
}
private:
static TargetMachine *Allocator(const Target &T, const Module &M,
const std::string &FS) {
return new TargetMachineImpl(T, M, FS);
}
};
}
#endif

95
include/llvm/Target/TargetRegistry.h
View File

@ -19,6 +19,9 @@
#ifndef LLVM_TARGET_TARGETREGISTRY_H
#define LLVM_TARGET_TARGETREGISTRY_H
// FIXME: We shouldn't need this header, but we need it until there is a
// different interface to get the TargetAsmInfo.
#include "llvm/Target/TargetMachine.h"
#include <string>
#include <cassert>
@ -278,6 +281,98 @@ namespace llvm {
/// @}
};
//===--------------------------------------------------------------------===//
/// RegisterTarget - Helper template for registering a target, for use in the
/// target's initialization function. Usage:
///
///
/// Target TheFooTarget; // The global target instance.
///
/// namespace {
/// struct FooInfo {
/// static unsigned getJITMatchQuality() { ... }
/// static unsigned getTripleMatchQuality(const std::string &) { ... }
/// static unsigned getModuleMatchQuality(const Module &) { ... }
/// };
/// }
///
/// extern "C" void LLVMInitializeFooTargetInfo() {
/// RegisterTarget<FooAsmPrinter> X(TheFooTarget, "foo", "Foo description");
/// }
template<class TargetInfoImpl>
struct RegisterTarget {
RegisterTarget(Target &T, const char *Name, const char *Desc) {
TargetRegistry::RegisterTarget(T, Name, Desc,
&TargetInfoImpl::getTripleMatchQuality,
&TargetInfoImpl::getModuleMatchQuality,
&TargetInfoImpl::getJITMatchQuality);
}
};
/// RegisterTargetMachine - Helper template for registering a target machine
/// implementation, for use in the target machine initialization
/// function. Usage:
///
/// extern "C" void LLVMInitializeFooTarget() {
/// extern Target TheFooTarget;
/// RegisterTargetMachine<FooTargetMachine> X(TheFooTarget);
/// }
template<class TargetMachineImpl>
struct RegisterTargetMachine {
RegisterTargetMachine(Target &T) {
TargetRegistry::RegisterTargetMachine(T, &Allocator);
}
private:
static TargetMachine *Allocator(const Target &T, const Module &M,
const std::string &FS) {
return new TargetMachineImpl(T, M, FS);
}
};
/// RegisterAsmPrinter - Helper template for registering a target specific
/// assembly printer, for use in the target machine initialization
/// function. Usage:
///
/// extern "C" void LLVMInitializeFooAsmPrinter() {
/// extern Target TheFooTarget;
/// RegisterAsmPrinter<FooAsmPrinter> X(TheFooTarget);
/// }
template<class AsmPrinterImpl>
struct RegisterAsmPrinter {
RegisterAsmPrinter(Target &T) {
TargetRegistry::RegisterAsmPrinter(T, &Allocator);
}
private:
static FunctionPass *Allocator(formatted_raw_ostream &OS,
TargetMachine &TM,
bool Verbose) {
return new AsmPrinterImpl(OS, TM, TM.getTargetAsmInfo(), Verbose);
}
};
/// RegisterAsmParser - Helper template for registering a target specific asm
/// parser, for use in the target machine initialization function. Usage:
///
/// extern "C" void LLVMInitializeFooAsmPrinter() {
/// extern Target TheFooTarget;
/// RegisterAsmPrinter<FooAsmPrinter> X(TheFooTarget);
/// }
template<class AsmParserImpl>
struct RegisterAsmParser {
RegisterAsmParser(Target &T) {
TargetRegistry::RegisterAsmParser(T, &Allocator);
}
private:
static TargetAsmParser *Allocator(const Target &T) {
return new AsmParserImpl(T);
}
};
}
#endif

3
lib/Target/ARM/ARM.h
View File

@ -93,9 +93,6 @@ inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
}
FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM);
FunctionPass *createARMCodePrinterPass(formatted_raw_ostream &O,
TargetMachine &TM,
bool Verbose);
FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
MachineCodeEmitter &MCE);

15
lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -19,8 +19,8 @@
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
@ -28,14 +28,11 @@ static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
cl::desc("Disable if-conversion pass"));
// Register the target.
static RegisterTarget<ARMTargetMachine> X(llvm::TheARMTarget, "arm", "ARM");
static RegisterTarget<ThumbTargetMachine> Y(llvm::TheThumbTarget, "thumb",
"Thumb");
// Force static initialization.
extern "C" void LLVMInitializeARMTarget() { }
extern "C" void LLVMInitializeARMTarget() {
// Register the target.
RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
}
/// TargetMachine ctor - Create an ARM architecture model.
///

15
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
View File

@ -1304,19 +1304,8 @@ bool ARMAsmPrinter::doFinalization(Module &M) {
return AsmPrinter::doFinalization(M);
}
/// createARMCodePrinterPass - Returns a pass that prints the ARM
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
FunctionPass *llvm::createARMCodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
// Force static initialization.
extern "C" void LLVMInitializeARMAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(TheARMTarget, createARMCodePrinterPass);
TargetRegistry::RegisterAsmPrinter(TheThumbTarget, createARMCodePrinterPass);
RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);
}

3
lib/Target/Alpha/Alpha.h
View File

@ -26,9 +26,6 @@ namespace llvm {
class formatted_raw_ostream;
FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM);
FunctionPass *createAlphaCodePrinterPass(formatted_raw_ostream &OS,
TargetMachine &TM,
bool Verbose);
FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM);
FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
MachineCodeEmitter &MCE);

12
lib/Target/Alpha/AlphaTargetMachine.cpp
View File

@ -16,17 +16,15 @@
#include "AlphaTargetMachine.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
// Register the targets
static RegisterTarget<AlphaTargetMachine> X(TheAlphaTarget, "alpha",
"Alpha [experimental]");
// Force static initialization.
extern "C" void LLVMInitializeAlphaTarget() { }
extern "C" void LLVMInitializeAlphaTarget() {
// Register the target.
RegisterTargetMachine<AlphaTargetMachine> X(TheAlphaTarget);
}
const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
return new AlphaTargetAsmInfo(*this);

14
lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
View File

@ -63,17 +63,6 @@ namespace {
};
} // end of anonymous namespace
/// createAlphaCodePrinterPass - Returns a pass that prints the Alpha
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
FunctionPass *llvm::createAlphaCodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
#include "AlphaGenAsmWriter.inc"
void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum)
@ -288,6 +277,5 @@ bool AlphaAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeAlphaAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(TheAlphaTarget,
createAlphaCodePrinterPass);
RegisterAsmPrinter<AlphaAsmPrinter> X(TheAlphaTarget);
}

10
lib/Target/CBackend/CBackend.cpp
View File

@ -32,7 +32,6 @@
#include "llvm/Transforms/Scalar.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetRegistry.h"
#include "llvm/Support/CallSite.h"
#include "llvm/Support/CFG.h"
@ -50,11 +49,10 @@
#include <sstream>
using namespace llvm;
// Register the target.
static RegisterTarget<CTargetMachine> X(TheCBackendTarget, "c", "C backend");
// Force static initialization.
extern "C" void LLVMInitializeCBackendTarget() { }
extern "C" void LLVMInitializeCBackendTarget() {
// Register the target.
RegisterTargetMachine<CTargetMachine> X(TheCBackendTarget);
}
namespace {
/// CBackendNameAllUsedStructsAndMergeFunctions - This pass inserts names for

12
lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
View File

@ -584,17 +584,7 @@ void LinuxAsmPrinter::PrintGlobalVariable(const GlobalVariable *GVar) {
O << '\n';
}
/// createSPUCodePrinterPass - Returns a pass that prints the Cell SPU
/// assembly code for a MachineFunction to the given output stream, in a format
/// that the Linux SPU assembler can deal with.
///
FunctionPass *llvm::createSPUAsmPrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
// Force static initialization.
extern "C" void LLVMInitializeCellSPUAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(TheCellSPUTarget, createSPUAsmPrinterPass);
RegisterAsmPrinter<LinuxAsmPrinter> X(TheCellSPUTarget);
}

3
lib/Target/CellSPU/SPU.h
View File

@ -24,9 +24,6 @@ namespace llvm {
class formatted_raw_ostream;
FunctionPass *createSPUISelDag(SPUTargetMachine &TM);
FunctionPass *createSPUAsmPrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose);
/*--== Utility functions/predicates/etc used all over the place: --==*/
//! Predicate test for a signed 10-bit value

12
lib/Target/CellSPU/SPUTargetMachine.cpp
View File

@ -17,21 +17,17 @@
#include "SPUTargetMachine.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
namespace {
// Register the targets
RegisterTarget<SPUTargetMachine>
CELLSPU(TheCellSPUTarget, "cellspu", "STI CBEA Cell SPU [experimental]");
extern "C" void LLVMInitializeCellSPUTarget() {
// Register the target.
RegisterTargetMachine<SPUTargetMachine> X(TheCellSPUTarget);
}
// Force static initialization.
extern "C" void LLVMInitializeCellSPUTarget() { }
const std::pair<unsigned, int> *
SPUFrameInfo::getCalleeSaveSpillSlots(unsigned &NumEntries) const {
NumEntries = 1;

11
lib/Target/CppBackend/CPPBackend.cpp
View File

@ -23,7 +23,6 @@
#include "llvm/Pass.h"
#include "llvm/PassManager.h"
#include "llvm/TypeSymbolTable.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
@ -31,6 +30,7 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/Streams.h"
#include "llvm/Target/TargetRegistry.h"
#include "llvm/Config/config.h"
#include <algorithm>
#include <set>
@ -72,11 +72,10 @@ static cl::opt<std::string> NameToGenerate("cppfor", cl::Optional,
cl::desc("Specify the name of the thing to generate"),
cl::init("!bad!"));
// Register the target.
static RegisterTarget<CPPTargetMachine> X(TheCppBackendTarget, "cpp", "C++ backend");
// Force static initialization.
extern "C" void LLVMInitializeCppBackendTarget() { }
extern "C" void LLVMInitializeCppBackendTarget() {
// Register the target.
RegisterTargetMachine<CPPTargetMachine> X(TheCppBackendTarget);
}
namespace {
typedef std::vector<const Type*> TypeList;

9
lib/Target/MSIL/MSILWriter.cpp
View File

@ -22,6 +22,7 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/InstVisitor.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetRegistry.h"
#include "llvm/Transforms/Scalar.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/CodeGen/Passes.h"
@ -48,10 +49,10 @@ namespace {
};
}
static RegisterTarget<MSILTarget> X(TheMSILTarget, "msil", "MSIL backend");
// Force static initialization.
extern "C" void LLVMInitializeMSILTarget() { }
extern "C" void LLVMInitializeMSILTarget() {
// Register the target.
RegisterTargetMachine<MSILTarget> X(TheMSILTarget);
}
bool MSILModule::runOnModule(Module &M) {
ModulePtr = &M;

1
lib/Target/MSIL/MSILWriter.h
View File

@ -26,7 +26,6 @@
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Support/Mangler.h"
#include <ios>
using namespace llvm;

3
lib/Target/MSP430/MSP430.h
View File

@ -24,9 +24,6 @@ namespace llvm {
FunctionPass *createMSP430ISelDag(MSP430TargetMachine &TM,
CodeGenOpt::Level OptLevel);
FunctionPass *createMSP430CodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose);
extern Target TheMSP430Target;

20
lib/Target/MSP430/MSP430AsmPrinter.cpp
View File

@ -1,4 +1,4 @@
//===-- MSP430AsmPrinter.cpp - MSP430 LLVM assembly writer ------------------===//
//===-- MSP430AsmPrinter.cpp - MSP430 LLVM assembly writer ----------------===//
//
// The LLVM Compiler Infrastructure
//
@ -27,6 +27,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetRegistry.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/FormattedStream.h"
@ -72,17 +73,6 @@ namespace {
#include "MSP430GenAsmWriter.inc"
/// createMSP430CodePrinterPass - Returns a pass that prints the MSP430
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
FunctionPass *llvm::createMSP430CodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
void MSP430AsmPrinter::emitFunctionHeader(const MachineFunction &MF) {
const Function *F = MF.getFunction();
@ -255,3 +245,9 @@ void MSP430AsmPrinter::printCCOperand(const MachineInstr *MI, int OpNum) {
break;
}
}
extern "C" void LLVMInitializeMSP430Target() {
// Register the target.
RegisterTargetMachine<MSP430TargetMachine> X(TheMSP430Target);
RegisterAsmPrinter<MSP430AsmPrinter> Y(TheMSP430Target);
}

12
lib/Target/MSP430/MSP430TargetMachine.cpp
View File

@ -18,20 +18,8 @@
#include "llvm/PassManager.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
// Register the targets
static RegisterTarget<MSP430TargetMachine>
X(TheMSP430Target, "msp430", "MSP430 [experimental]");
// Force static initialization.
extern "C" void LLVMInitializeMSP430Target() {
TargetRegistry::RegisterAsmPrinter(TheMSP430Target,
&createMSP430CodePrinterPass);
}
MSP430TargetMachine::MSP430TargetMachine(const Target &T,
const Module &M,
const std::string &FS) :

16
lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
View File

@ -87,16 +87,6 @@ namespace {
#include "MipsGenAsmWriter.inc"
/// createMipsCodePrinterPass - Returns a pass that prints the MIPS
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
FunctionPass *llvm::createMipsCodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
//===----------------------------------------------------------------------===//
//
// Mips Asm Directives
@ -560,8 +550,6 @@ void MipsAsmPrinter::PrintGlobalVariable(const GlobalVariable *GVar) {
// Force static initialization.
extern "C" void LLVMInitializeMipsAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(TheMipsTarget, createMipsCodePrinterPass);
TargetRegistry::RegisterAsmPrinter(TheMipselTarget,
createMipsCodePrinterPass);
RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
RegisterAsmPrinter<MipsAsmPrinter> Y(TheMipselTarget);
}

3
lib/Target/Mips/Mips.h
View File

@ -25,9 +25,6 @@ namespace llvm {
FunctionPass *createMipsISelDag(MipsTargetMachine &TM);
FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);
FunctionPass *createMipsCodePrinterPass(formatted_raw_ostream &OS,
TargetMachine &TM,
bool Verbose);
extern Target TheMipsTarget;
extern Target TheMipselTarget;

15
lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -16,17 +16,14 @@
#include "MipsTargetMachine.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
// Register the target.
static RegisterTarget<MipsTargetMachine> X(TheMipsTarget, "mips", "Mips");
static RegisterTarget<MipselTargetMachine> Y(TheMipselTarget, "mipsel",
"Mipsel");
// Force static initialization.
extern "C" void LLVMInitializeMipsTarget() { }
extern "C" void LLVMInitializeMipsTarget() {
// Register the target.
RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
}
const TargetAsmInfo *MipsTargetMachine::
createTargetAsmInfo() const

5
lib/Target/PIC16/PIC16.h
View File

@ -343,10 +343,7 @@ namespace PIC16CC {
FunctionPass *createPIC16ISelDag(PIC16TargetMachine &TM);
FunctionPass *createPIC16CodePrinterPass(formatted_raw_ostream &OS,
TargetMachine &TM,
bool Verbose);
// Banksel optimzer pass.
// Banksel optimizer pass.
FunctionPass *createPIC16MemSelOptimizerPass();
extern Target ThePIC16Target;

20
lib/Target/PIC16/PIC16AsmPrinter.cpp
View File

@ -24,6 +24,7 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
@ -107,17 +108,6 @@ bool PIC16AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
return false; // we didn't modify anything.
}
/// createPIC16CodePrinterPass - Returns a pass that prints the PIC16
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
FunctionPass *llvm::createPIC16CodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
// printOperand - print operand of insn.
void PIC16AsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
@ -435,3 +425,11 @@ void PIC16AsmPrinter::EmitRemainingAutos() {
}
}
extern "C" void LLVMInitializePIC16Target() {
// Register the targets
RegisterTargetMachine<PIC16TargetMachine> A(ThePIC16Target);
RegisterTargetMachine<CooperTargetMachine> B(TheCooperTarget);
RegisterAsmPrinter<PIC16AsmPrinter> C(ThePIC16Target);
RegisterAsmPrinter<PIC16AsmPrinter> D(TheCooperTarget);
}

16
lib/Target/PIC16/PIC16TargetMachine.cpp
View File

@ -18,25 +18,9 @@
#include "llvm/PassManager.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
// Register the targets
static RegisterTarget<PIC16TargetMachine>
X(ThePIC16Target, "pic16", "PIC16 14-bit [experimental].");
static RegisterTarget<CooperTargetMachine>
Y(TheCooperTarget, "cooper", "PIC16 Cooper [experimental].");
// Force static initialization.
extern "C" void LLVMInitializePIC16Target() {
TargetRegistry::RegisterAsmPrinter(ThePIC16Target,
&createPIC16CodePrinterPass);
TargetRegistry::RegisterAsmPrinter(TheCooperTarget,
&createPIC16CodePrinterPass);
}
// PIC16TargetMachine - Traditional PIC16 Machine.
PIC16TargetMachine::PIC16TargetMachine(const Target &T, const Module &M,
const std::string &FS, bool Cooper)

2
lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
View File

@ -1075,7 +1075,7 @@ bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
/// for a MachineFunction to the given output stream, in a format that the
/// Darwin assembler can deal with.
///
FunctionPass *llvm::createPPCAsmPrinterPass(formatted_raw_ostream &o,
static FunctionPass *createPPCAsmPrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
const PPCSubtarget *Subtarget = &tm.getSubtarget<PPCSubtarget>();

3
lib/Target/PowerPC/PPC.h
View File

@ -29,9 +29,6 @@ namespace llvm {
FunctionPass *createPPCBranchSelectionPass();
FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
FunctionPass *createPPCAsmPrinterPass(formatted_raw_ostream &OS,
TargetMachine &TM,
bool Verbose);
FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
MachineCodeEmitter &MCE);
FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM,

16
lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -16,20 +16,16 @@
#include "PPCTargetMachine.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegistry.h"
#include "llvm/Support/FormattedStream.h"
using namespace llvm;
// Register the targets
static RegisterTarget<PPC32TargetMachine>
X(ThePPC32Target, "ppc32", "PowerPC 32");
static RegisterTarget<PPC64TargetMachine>
Y(ThePPC64Target, "ppc64", "PowerPC 64");
// Force static initialization.
extern "C" void LLVMInitializePowerPCTarget() { }
extern "C" void LLVMInitializePowerPCTarget() {
// Register the targets
RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
}
const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
if (Subtarget.isDarwin())

14
lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
View File

@ -76,17 +76,6 @@ namespace {
#include "SparcGenAsmWriter.inc"
/// createSparcCodePrinterPass - Returns a pass that prints the SPARC
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
FunctionPass *llvm::createSparcCodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
/// runOnMachineFunction - This uses the printInstruction()
/// method to print assembly for each instruction.
@ -336,6 +325,5 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeSparcAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(TheSparcTarget,
createSparcCodePrinterPass);
RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
}

3
lib/Target/Sparc/Sparc.h
View File

@ -25,9 +25,6 @@ namespace llvm {
class formatted_raw_ostream;
FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
FunctionPass *createSparcCodePrinterPass(formatted_raw_ostream &OS,
TargetMachine &TM,
bool Verbose);
FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
FunctionPass *createSparcFPMoverPass(TargetMachine &TM);

11
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -15,14 +15,13 @@
#include "Sparc.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
// Register the target.
static RegisterTarget<SparcTargetMachine> X(TheSparcTarget, "sparc", "SPARC");
// Force static initialization.
extern "C" void LLVMInitializeSparcTarget() { }
extern "C" void LLVMInitializeSparcTarget() {
// Register the target.
RegisterTargetMachine<SparcTargetMachine> X(TheSparcTarget);
}
const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
// FIXME: Handle Solaris subtarget someday :)

14
lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
View File

@ -78,17 +78,6 @@ namespace {
#include "SystemZGenAsmWriter.inc"
/// createSystemZCodePrinterPass - Returns a pass that prints the SystemZ
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
FunctionPass *llvm::createSystemZCodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new SystemZAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
void SystemZAsmPrinter::emitFunctionHeader(const MachineFunction &MF) {
unsigned FnAlign = MF.getAlignment();
const Function *F = MF.getFunction();
@ -403,6 +392,5 @@ void SystemZAsmPrinter::PrintGlobalVariable(const GlobalVariable* GVar) {
// Force static initialization.
extern "C" void LLVMInitializeSystemZAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(TheSystemZTarget,
createSystemZCodePrinterPass);
RegisterAsmPrinter<SystemZAsmPrinter> X(TheSystemZTarget);
}

3
lib/Target/SystemZ/SystemZ.h
View File

@ -46,9 +46,6 @@ namespace llvm {
FunctionPass *createSystemZISelDag(SystemZTargetMachine &TM,
CodeGenOpt::Level OptLevel);
FunctionPass *createSystemZCodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose);
extern Target TheSystemZTarget;

15
lib/Target/SystemZ/SystemZTargetMachine.cpp
View File

@ -1,4 +1,4 @@
//===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -----------===//
//===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -------===//
//
// The LLVM Compiler Infrastructure
//
@ -15,19 +15,12 @@
#include "SystemZ.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
namespace {
// Register the target.
RegisterTarget<SystemZTargetMachine> X(TheSystemZTarget,
"systemz",
"SystemZ [experimental]");
}
// Force static initialization.
extern "C" void LLVMInitializeSystemZTarget() {
// Register the target.
RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
}
const TargetAsmInfo *SystemZTargetMachine::createTargetAsmInfo() const {

10
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -56,14 +56,8 @@ bool X86ATTAsmParser::ParseInstruction(MCAsmParser &AP, const char *Name,
return MatchInstruction(Name, Operands, Inst);
}
namespace {
TargetAsmParser *createAsmParser(const Target &T) {
return new X86ATTAsmParser(T);
}
}
// Force static initialization.
extern "C" void LLVMInitializeX86AsmParser() {
TargetRegistry::RegisterAsmParser(TheX86_32Target, &createAsmParser);
TargetRegistry::RegisterAsmParser(TheX86_64Target, &createAsmParser);
RegisterAsmParser<X86ATTAsmParser> X(TheX86_32Target);
RegisterAsmParser<X86ATTAsmParser> Y(TheX86_64Target);
}

6
lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
View File

@ -25,9 +25,9 @@ using namespace llvm;
/// for a MachineFunction to the given output stream, using the given target
/// machine description.
///
FunctionPass *llvm::createX86CodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
static FunctionPass *createX86CodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
const X86Subtarget *Subtarget = &tm.getSubtarget<X86Subtarget>();
if (Subtarget->isFlavorIntel())

8
lib/Target/X86/X86.h
View File

@ -42,14 +42,6 @@ FunctionPass *createX86FloatingPointStackifierPass();
///
FunctionPass *createX87FPRegKillInserterPass();
/// createX86CodePrinterPass - Returns a pass that prints the X86
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description.
///
FunctionPass *createX86CodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool Verbose);
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
/// to the specified MCE object.

14
lib/Target/X86/X86TargetMachine.cpp
View File

@ -20,19 +20,13 @@
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
// Register the target.
static RegisterTarget<X86_32TargetMachine>
X(TheX86_32Target, "x86", "32-bit X86: Pentium-Pro and above");
static RegisterTarget<X86_64TargetMachine>
Y(TheX86_64Target, "x86-64", "64-bit X86: EM64T and AMD64");
// Force static initialization.
extern "C" void LLVMInitializeX86Target() {
// Register the target.
RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
}
const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {

3
lib/Target/XCore/XCore.h
View File

@ -24,9 +24,6 @@ namespace llvm {
class formatted_raw_ostream;
FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM);
FunctionPass *createXCoreCodePrinterPass(formatted_raw_ostream &OS,
TargetMachine &TM,
bool Verbose);
extern Target TheXCoreTarget;

18
lib/Target/XCore/XCoreAsmPrinter.cpp
View File

@ -28,6 +28,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetRegistry.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
@ -91,17 +92,6 @@ namespace {
#include "XCoreGenAsmWriter.inc"
/// createXCoreCodePrinterPass - Returns a pass that prints the XCore
/// assembly code for a MachineFunction to the given output stream,
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
FunctionPass *llvm::createXCoreCodePrinterPass(formatted_raw_ostream &o,
TargetMachine &tm,
bool verbose) {
return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
}
void XCoreAsmPrinter::
emitGlobalDirective(const std::string &name)
{
@ -387,3 +377,9 @@ bool XCoreAsmPrinter::doInitialization(Module &M) {
}
// Force static initialization.
extern "C" void LLVMInitializeXCoreTarget() {
RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
RegisterAsmPrinter<XCoreAsmPrinter> Y(TheXCoreTarget);
}

12
lib/Target/XCore/XCoreTargetMachine.cpp
View File

@ -15,20 +15,8 @@
#include "XCore.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
namespace {
// Register the target.
RegisterTarget<XCoreTargetMachine> X(TheXCoreTarget, "xcore", "XCore");
}
// Force static initialization.
extern "C" void LLVMInitializeXCoreTarget() {
TargetRegistry::RegisterAsmPrinter(TheXCoreTarget,
&createXCoreCodePrinterPass);
}
const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const {
return new XCoreTargetAsmInfo(*this);
}