mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-24 09:29:42 +00:00
Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant.
- Check for MTCTR8 in addition to MTCTR when looking up a hazard. - When lowering an indirect call use CTR8 when targeting 64bit. - Introduce BCTR8 that uses CTR8 and use it on 64bit when expanding ISD::BRIND. The last change fixes PR8487. With those changes, we are able to compile a running "ls" and "sh" on FreeBSD/PowerPC64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132552 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
422b62b407
commit
0c9b559bfd
@ -233,7 +233,7 @@ void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) {
|
|||||||
unsigned Opcode = Node->getMachineOpcode();
|
unsigned Opcode = Node->getMachineOpcode();
|
||||||
|
|
||||||
// Update structural hazard information.
|
// Update structural hazard information.
|
||||||
if (Opcode == PPC::MTCTR) HasCTRSet = true;
|
if (Opcode == PPC::MTCTR || Opcode == PPC::MTCTR8) HasCTRSet = true;
|
||||||
|
|
||||||
// Track the address stored to.
|
// Track the address stored to.
|
||||||
if (isStore) {
|
if (isStore) {
|
||||||
|
@ -1057,9 +1057,10 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) {
|
|||||||
SDValue Chain = N->getOperand(0);
|
SDValue Chain = N->getOperand(0);
|
||||||
SDValue Target = N->getOperand(1);
|
SDValue Target = N->getOperand(1);
|
||||||
unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8;
|
unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8;
|
||||||
|
unsigned Reg = Target.getValueType() == MVT::i32 ? PPC::BCTR : PPC::BCTR8;
|
||||||
Chain = SDValue(CurDAG->getMachineNode(Opc, dl, MVT::Other, Target,
|
Chain = SDValue(CurDAG->getMachineNode(Opc, dl, MVT::Other, Target,
|
||||||
Chain), 0);
|
Chain), 0);
|
||||||
return CurDAG->SelectNodeTo(N, PPC::BCTR, MVT::Other, Chain);
|
return CurDAG->SelectNodeTo(N, Reg, MVT::Other, Chain);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -2562,7 +2562,7 @@ unsigned PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag,
|
|||||||
Callee.setNode(0);
|
Callee.setNode(0);
|
||||||
// Add CTR register as callee so a bctr can be emitted later.
|
// Add CTR register as callee so a bctr can be emitted later.
|
||||||
if (isTailCall)
|
if (isTailCall)
|
||||||
Ops.push_back(DAG.getRegister(PPC::CTR, PtrVT));
|
Ops.push_back(DAG.getRegister(isPPC64 ? PPC::CTR8 : PPC::CTR, PtrVT));
|
||||||
}
|
}
|
||||||
|
|
||||||
// If this is a direct call, pass the chain and the callee.
|
// If this is a direct call, pass the chain and the callee.
|
||||||
|
@ -190,10 +190,15 @@ def TCRETURNri8 : Pseudo<(outs), (ins CTRRC8:$dst, i32imm:$offset, variable_ops)
|
|||||||
|
|
||||||
|
|
||||||
let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1,
|
let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1,
|
||||||
isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR, RM] in
|
isIndirectBranch = 1, isCall = 1, Uses = [CTR8, RM] in {
|
||||||
def TAILBCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>,
|
let isReturn = 1 in {
|
||||||
Requires<[In64BitMode]>;
|
def TAILBCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>,
|
||||||
|
Requires<[In64BitMode]>;
|
||||||
|
}
|
||||||
|
|
||||||
|
def BCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>,
|
||||||
|
Requires<[In64BitMode]>;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7,
|
let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7,
|
||||||
|
@ -1,5 +1,6 @@
|
|||||||
; RUN: llc < %s -relocation-model=pic -march=ppc32 -mtriple=powerpc-apple-darwin | FileCheck %s -check-prefix=PIC
|
; RUN: llc < %s -relocation-model=pic -march=ppc32 -mtriple=powerpc-apple-darwin | FileCheck %s -check-prefix=PIC
|
||||||
; RUN: llc < %s -relocation-model=static -march=ppc32 -mtriple=powerpc-apple-darwin | FileCheck %s -check-prefix=STATIC
|
; RUN: llc < %s -relocation-model=static -march=ppc32 -mtriple=powerpc-apple-darwin | FileCheck %s -check-prefix=STATIC
|
||||||
|
; RUN: llc < %s -relocation-model=pic -march=ppc64 -mtriple=powerpc64-apple-darwin | FileCheck %s -check-prefix=PPC64
|
||||||
|
|
||||||
@nextaddr = global i8* null ; <i8**> [#uses=2]
|
@nextaddr = global i8* null ; <i8**> [#uses=2]
|
||||||
@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
|
@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
|
||||||
@ -7,6 +8,7 @@
|
|||||||
define internal i32 @foo(i32 %i) nounwind {
|
define internal i32 @foo(i32 %i) nounwind {
|
||||||
; PIC: foo:
|
; PIC: foo:
|
||||||
; STATIC: foo:
|
; STATIC: foo:
|
||||||
|
; PPC64: foo:
|
||||||
entry:
|
entry:
|
||||||
%0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
|
%0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
|
||||||
%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
|
%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
|
||||||
@ -18,6 +20,8 @@ bb2: ; preds = %entry, %bb3
|
|||||||
; PIC-NEXT: bctr
|
; PIC-NEXT: bctr
|
||||||
; STATIC: mtctr
|
; STATIC: mtctr
|
||||||
; STATIC-NEXT: bctr
|
; STATIC-NEXT: bctr
|
||||||
|
; PPC64: mtctr
|
||||||
|
; PPC64-NEXT: bctr
|
||||||
indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
|
indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
|
||||||
|
|
||||||
bb3: ; preds = %entry
|
bb3: ; preds = %entry
|
||||||
|
Loading…
Reference in New Issue
Block a user