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shl is always zero extending, so always use a zero extending shift right.

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This latent bug was exposed by recent changes, and is tested as:
llvm/test/Regression/Transforms/InstCombine/2004-09-28-BadShiftAndSetCC.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16546 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-09-28 17:54:07 +00:00
parent 8fb6882f19
commit 0cba71b0d6
1 changed files with 12 additions and 5 deletions
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17
lib/Transforms/Scalar/InstructionCombining.cpp
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@ -1506,7 +1506,7 @@ Instruction *InstCombiner::visitSetCondInst(BinaryOperator &I) {
// rights, as they sign-extend.
if (ShAmt) {
bool CanFold = Shift->getOpcode() != Instruction::Shr ||
Shift->getType()->isUnsigned();
Shift->getType()->isUnsigned();
if (!CanFold) {
// To test for the bad case of the signed shr, see if any
// of the bits shifted in could be tested after the mask.
@ -1519,9 +1519,11 @@ Instruction *InstCombiner::visitSetCondInst(BinaryOperator &I) {
}
if (CanFold) {
unsigned ShiftOp = Shift->getOpcode() == Instruction::Shl
? Instruction::Shr : Instruction::Shl;
Constant *NewCst = ConstantExpr::get(ShiftOp, CI, ShAmt);
Constant *NewCst;
if (Shift->getOpcode() == Instruction::Shl)
NewCst = ConstantExpr::getUShr(CI, ShAmt);
else
NewCst = ConstantExpr::getShl(CI, ShAmt);
// Check to see if we are shifting out any of the bits being
// compared.
@ -1535,7 +1537,12 @@ Instruction *InstCombiner::visitSetCondInst(BinaryOperator &I) {
return ReplaceInstUsesWith(I, ConstantBool::True);
} else {
I.setOperand(1, NewCst);
LHSI->setOperand(1, ConstantExpr::get(ShiftOp, AndCST,ShAmt));
Constant *NewAndCST;
if (Shift->getOpcode() == Instruction::Shl)
NewAndCST = ConstantExpr::getUShr(AndCST, ShAmt);
else
NewAndCST = ConstantExpr::getShl(AndCST, ShAmt);
LHSI->setOperand(1, NewAndCST);
LHSI->setOperand(0, Shift->getOperand(0));
WorkList.push_back(Shift); // Shift is dead.
AddUsesToWorkList(I);