Don't re-use existing addrec expansions if they contain casts.

This fixes PR9259.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126812 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2011-03-02 01:34:10 +00:00
parent f06e6c2ba7
commit 0cbe91ba3b
2 changed files with 24 additions and 1 deletions

View File

@ -858,7 +858,8 @@ SCEVExpander::getAddRecExprPHILiterally(const SCEVAddRecExpr *Normalized,
// loop already visited by LSR for example, but it wouldn't have
// to be.
do {
if (IncV->getNumOperands() == 0 || isa<PHINode>(IncV)) {
if (IncV->getNumOperands() == 0 || isa<PHINode>(IncV) ||
isa<CastInst>(IncV)) {
IncV = 0;
break;
}

View File

@ -0,0 +1,22 @@
; RUN: llc -march=x86-64 < %s
define void @dw2102_i2c_transfer() nounwind {
entry:
br label %bb
bb: ; preds = %bb, %entry
%z = phi i64 [ 0, %entry ], [ %z3, %bb ]
%z1 = phi i16 [ undef, %entry ], [ %z6, %bb ]
%z2 = phi i32 [ 0, %entry ], [ %z8, %bb ]
%z3 = add i64 %z, 1
%z4 = zext i16 %z1 to i32
%z5 = add nsw i32 %z4, %z2
%z6 = trunc i32 %z5 to i16
call fastcc void @dw210x_op_rw(i16 zeroext %z6)
%z7 = getelementptr i8* null, i64 %z
store i8 undef, i8* %z7, align 1
%z8 = add nsw i32 %z2, 1
br label %bb
}
declare fastcc void @dw210x_op_rw(i16 zeroext) nounwind