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Eliminate some SUBREG_TO_REG patterns with sub_ss and sub_sd.
The SUBREG_TO_REG instruction has magic semantics asserting that the source value was defined by an instruction that cleared the high half of the register. Those semantics are never actually exploited for xmm registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160818 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -717,14 +717,13 @@ let Predicates = [HasSSE1] in {
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}
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let AddedComplexity = 20 in {
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// MOVSSrm zeros the high parts of the register; represent this
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// with SUBREG_TO_REG.
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// MOVSSrm already zeros the high parts of the register.
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def : Pat<(v4f32 (X86vzmovl (v4f32 (scalar_to_vector (loadf32 addr:$src))))),
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(SUBREG_TO_REG (i32 0), (MOVSSrm addr:$src), sub_ss)>;
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(COPY_TO_REGCLASS (MOVSSrm addr:$src), VR128)>;
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def : Pat<(v4f32 (scalar_to_vector (loadf32 addr:$src))),
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(SUBREG_TO_REG (i32 0), (MOVSSrm addr:$src), sub_ss)>;
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(COPY_TO_REGCLASS (MOVSSrm addr:$src), VR128)>;
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def : Pat<(v4f32 (X86vzmovl (loadv4f32 addr:$src))),
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(SUBREG_TO_REG (i32 0), (MOVSSrm addr:$src), sub_ss)>;
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(COPY_TO_REGCLASS (MOVSSrm addr:$src), VR128)>;
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}
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// Extract and store.
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@ -748,18 +747,17 @@ let Predicates = [HasSSE2] in {
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}
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let AddedComplexity = 20 in {
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// MOVSDrm zeros the high parts of the register; represent this
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// with SUBREG_TO_REG.
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// MOVSDrm already zeros the high parts of the register.
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def : Pat<(v2f64 (X86vzmovl (v2f64 (scalar_to_vector (loadf64 addr:$src))))),
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(SUBREG_TO_REG (i64 0), (MOVSDrm addr:$src), sub_sd)>;
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(COPY_TO_REGCLASS (MOVSDrm addr:$src), VR128)>;
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def : Pat<(v2f64 (scalar_to_vector (loadf64 addr:$src))),
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(SUBREG_TO_REG (i64 0), (MOVSDrm addr:$src), sub_sd)>;
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(COPY_TO_REGCLASS (MOVSDrm addr:$src), VR128)>;
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def : Pat<(v2f64 (X86vzmovl (loadv2f64 addr:$src))),
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(SUBREG_TO_REG (i64 0), (MOVSDrm addr:$src), sub_sd)>;
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(COPY_TO_REGCLASS (MOVSDrm addr:$src), VR128)>;
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def : Pat<(v2f64 (X86vzmovl (bc_v2f64 (loadv4f32 addr:$src)))),
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(SUBREG_TO_REG (i64 0), (MOVSDrm addr:$src), sub_sd)>;
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(COPY_TO_REGCLASS (MOVSDrm addr:$src), VR128)>;
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def : Pat<(v2f64 (X86vzload addr:$src)),
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(SUBREG_TO_REG (i64 0), (MOVSDrm addr:$src), sub_sd)>;
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(COPY_TO_REGCLASS (MOVSDrm addr:$src), VR128)>;
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}
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// Extract and store.
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