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allow regs to be in multiple reg classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23540 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -101,8 +101,6 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
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const std::vector<CodeGenRegisterClass> &RegisterClasses =
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Target.getRegisterClasses();
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std::set<Record*> RegistersFound;
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// Loop over all of the register classes... emitting each one.
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OS << "namespace { // Register classes...\n";
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@ -121,10 +119,6 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
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<< "[] = {\n ";
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for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
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Record *Reg = RC.Elements[i];
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if (RegistersFound.count(Reg))
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throw "Register '" + Reg->getName() +
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"' included in multiple register classes!";
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RegistersFound.insert(Reg);
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OS << getQualifiedName(Reg) << ", ";
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// Keep track of which regclasses this register is in.
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@ -232,18 +226,8 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
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unsigned SpillAlign = Reg.DeclaredSpillAlignment;
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for (; I != E; ++I) { // For each reg class this belongs to.
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const CodeGenRegisterClass *RC = I->second;
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if (SpillSize == 0)
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SpillSize = RC->SpillSize;
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else if (SpillSize != RC->SpillSize)
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throw "Spill size for regclass '" + RC->getName() +
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"' doesn't match spill sized already inferred for register '" +
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Reg.getName() + "'!";
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if (SpillAlign == 0)
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SpillAlign = RC->SpillAlignment;
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else if (SpillAlign != RC->SpillAlignment)
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throw "Spill alignment for regclass '" + RC->getName() +
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"' doesn't match spill sized already inferred for register '" +
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Reg.getName() + "'!";
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SpillSize = std::max(SpillSize, RC->SpillSize);
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SpillAlign = std::max(SpillAlign, RC->SpillAlignment);
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}
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OS << SpillSize << ", " << SpillAlign << " },\n";
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