From 0d4c9d94f68fc561ebb11709ed99367e490af003 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 15 Mar 2011 21:15:20 +0000 Subject: [PATCH] The VTBL (and VTBX) instructions are rather permissive concerning the masks they accept. If a value in the mask is out of range, it uses the value 0, for VTBL, or leaves the value unchanged, for VTBX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127700 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMISelLowering.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 180b2c3b639..35a9bf78c2e 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -3541,6 +3541,13 @@ static bool isVREVMask(const SmallVectorImpl &M, EVT VT, return true; } +static bool isVTBLMask(const SmallVectorImpl &M, EVT VT) { + // We can handle <8 x i8> vector shuffles. If the index in the mask is out of + // range, then 0 is placed into the resulting vector. So pretty much any mask + // of 8 elements can work here. + return VT == MVT::v8i8 && M.size() == 8; +} + static bool isVTRNMask(const SmallVectorImpl &M, EVT VT, unsigned &WhichResult) { unsigned EltSz = VT.getVectorElementType().getSizeInBits(); @@ -3980,6 +3987,7 @@ ARMTargetLowering::isShuffleMaskLegal(const SmallVectorImpl &M, isVREVMask(M, VT, 32) || isVREVMask(M, VT, 16) || isVEXTMask(M, VT, ReverseVEXT, Imm) || + isVTBLMask(M, VT) || isVTRNMask(M, VT, WhichResult) || isVUZPMask(M, VT, WhichResult) || isVZIPMask(M, VT, WhichResult) ||