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synced 2024-08-24 09:29:42 +00:00
Factor out a SelectTrunc function. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143523 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -167,7 +167,8 @@ class ARMFastISel : public FastISel {
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bool SelectCall(const Instruction *I);
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bool SelectSelect(const Instruction *I);
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bool SelectRet(const Instruction *I);
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bool SelectIntCast(const Instruction *I);
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bool SelectTrunc(const Instruction *I);
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bool SelectIntExt(const Instruction *I);
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// Utility routines.
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private:
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@ -1963,7 +1964,30 @@ bool ARMFastISel::SelectCall(const Instruction *I) {
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}
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bool ARMFastISel::SelectIntCast(const Instruction *I) {
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bool ARMFastISel::SelectTrunc(const Instruction *I) {
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// The high bits for a type smaller than the register size are assumed to be
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// undefined.
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Value *Op = I->getOperand(0);
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EVT SrcVT, DestVT;
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SrcVT = TLI.getValueType(Op->getType(), true);
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DestVT = TLI.getValueType(I->getType(), true);
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if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
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return false;
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if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
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return false;
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unsigned SrcReg = getRegForValue(Op);
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if (!SrcReg) return false;
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// Because the high bits are undefined, a truncate doesn't generate
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// any code.
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UpdateValueMap(I, SrcReg);
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return true;
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}
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bool ARMFastISel::SelectIntExt(const Instruction *I) {
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// On ARM, in general, integer casts don't involve legal types; this code
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// handles promotable integers. The high bits for a type smaller than
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// the register size are assumed to be undefined.
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@ -1975,20 +1999,6 @@ bool ARMFastISel::SelectIntCast(const Instruction *I) {
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SrcVT = TLI.getValueType(SrcTy, true);
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DestVT = TLI.getValueType(DestTy, true);
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if (isa<TruncInst>(I)) {
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if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
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return false;
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if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
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return false;
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unsigned SrcReg = getRegForValue(Op);
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if (!SrcReg) return false;
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// Because the high bits are undefined, a truncate doesn't generate
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// any code.
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UpdateValueMap(I, SrcReg);
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return true;
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}
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if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8)
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return false;
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@ -2078,9 +2088,10 @@ bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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case Instruction::Ret:
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return SelectRet(I);
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case Instruction::Trunc:
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return SelectTrunc(I);
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case Instruction::ZExt:
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case Instruction::SExt:
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return SelectIntCast(I);
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return SelectIntExt(I);
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default: break;
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}
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return false;
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